SA-WCT100/SS-MCT100
SA-WCT100/SS-MCT100
20
20
5-6. SCHEMATIC DIAGRAM - MAIN Board (2/7) (SA-WCT100) -
• See Page 40 for Waveforms. • See Page 40 for IC Block Diagrams.
CN202
BOARD
IO
B
(7/7)
BOARD
MAIN
7
(1/7)
BOARD
MAIN
5
(1/7)
BOARD
MAIN
4
IC B/D
IC B/D
IC B/D
6
(7/7)
MAIN
BOARD
2
(3/7)
MAIN
BOARD
3
2
1
4
0
3.4
1.8
3.4
3.3
3.3
1.2
1.7
1.7
1.7
3.3
12
3.4
0
3.4
3.4
0
0
3.4
5
2.5
2.5
2.5
8.9
0
1.5
1.6
3.4
3.4
2.5
1.7
1.7
1.7
5
6.1
0
3.3
3.4
3.4
3.3
1.3
3.3
2.7
0.1
C1023
0.1
C1062
100
R1080
100
R1079
100
R1078
1M
R1075
100
R1113
10uH
L1002
10uH
L1001
0.1
C1028
100
R1114
0.1
C1045
16V
100
C1063
16V
10
C1047
2.2
C1044
0.1
C1035
16V
10
C1031
C1034
0.01
1k
R1071
1k
R1115
100
R1100
R1098 100
100
R1097
100
R1099
5
4
3
2
1
TK11150CSCL-G
IC1008
CTRL
GND
CNP
VOUT
VIN
100
R1018
0.1
C1024
16V
10
C1022
1k
R1076
15p
C1019
12p
C1018
16V
100
C1027
100
R1043
100
R1046
0.1
C1006
0.01
C1007
100
R1048
100
R1052
100
R1053
100
R1054
100
R1056
0.1
C1008
0.1
C1009
100
R1058
100
R1059
100
R1045
100
R1060
I
O
G
IC1010
TA78L09F-TE12L
1
2
3
10uH
L1003
0.1
C1061
220
R1088
0.068
C1026
16V
10
C1074
0.1
C1075
1000p
C1073
220
R1083
R1033
10k
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
AK5358AET-E2
IC1208
AINR
AINL
CKS1
VCOM
AGND
VA
VD
DGND
SDTO
LRCK
MCLK
SCLK
PDN
DIF
CKS2
CKS0
123456789
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
LC890561W
IC1011
DISEL(I)
SPDIF(O)
DIN0
DIN1
DIN2
DGND
DVDD
AD_IN
AGND
LPF(O)
AVDD
AGND
CKOUT
BCK(O)
LRCK(O)
DA
TA(O)
XST
A
TE(O)
DGND
DVDD
XMCK(O)
XOUT(O)
XIN(I)
EMPHA
AUDIO(O)
CSFLAG(O)
F0(O)
F1(O)
F2(O)
FV(O)
DVDD
DGND
VREF
BPSYNC(O)
ERROR(O)
DO
DI
CE
CL(I)
XSEL(I)
MODE0(I)
MODE1(I)
DGND
DVDD
DOSEL0(I)
DOSEL1(I)
CKSEL0(I)
CKSEL1(I)
XMODE
100
R1111
MA2J1110GLS0
D1004
MA2J1110GLS0
D1005
C1071
1000p
C1072
1000p
C1030
1000p
1
C1051
MA2J1110GLS0
D1008
1
C1041
16V
100
C1048
MC2838-T112-1
D1011
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
19P
CN1018
E6V
E6V
DGND
DGND
D3.3V
COAX
OPT
DMP_DET
A_SEL2
A_SEL1
A_SEL0
UCOM-DMP_TXD
E6V
UCOM-DMP_RXD
A9V
R CH
AGND
L CH
AGND
12.288MHz
X1002
A1
A2
A3
A4
A5
A6
A7
C1
C8
C7
C6
C5
C2
DIR
SEL
DMPORT
A0
DATA_DIR
DIR_NONAU
DIR_RERR
DIR_ZERO
DMPORT_RX_IN/RXD1
DMPORT_TX_OUT/TXD1
A_SEL0
A_SEL1
A_SEL2
DMPORT_DET
DIR_CSFLAG
DIR_ERR
DIR_DO
DIR_XSTATE
DIR_CE
A/D CONVERTER
+5V REGULATOR
IC1008
+9V REGULATOR
IC1010
IC1208
(2/7)
MAIN BOARD
INTERFACE RECEIVER
IC1011
DIGITAL AUDIO
7
11
D
B
6
9
10
F
5
3
G
1
12
C
E
8
4
13
A
14
2
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(Page 19)
(Page 25)
(Page 29)
(Page 25)