Sony RMT-V267B, Service Manual

Page: 64 / 91

5-4E
Pin No.
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
Pin Name
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
N.C
N.C
GRID10
GRID9
GRID8
GRID7
GRID6
GRID5
GRID4
GRID3
GRID2
GRID1
VDD
TX
TEX
NC/VCC
ASURA CS
SYS RESET
POWER CONT M12
POWER CONT SW12
CG V
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
O
O
O
O
O
I
Function
Segment terminal 8.
Segment terminal 9.
Segment terminal 10.
Segment terminal 11.
Segment terminal 12.
Segment terminal 13.
Segment terminal 14.
Segment terminal 15.
Segment terminal 16.
Not used.
Not used.
Grid terminal 10.
Grid terminal 9.
Grid terminal 8.
Grid terminal 7.
Grid terminal 6.
Grid terminal 5.
Grid terminal 4.
Grid terminal 3.
Grid terminal 2.
Grid terminal 1.
D5 V
Timer clock terminal (32.768 kHz).
Timer clock terminal (32.768 kHz).
D5 V
S/S microcomputer chip select
signal.
System reset output.
Power supply control signal.
Power supply control signal.
Composite sync input.
5-7. TUNER/TIMER CONTROL MICROPROCESSOR PIN FUNCTIONS
(MA-360 BOARD IC460)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
Pin Name
SYNC ON
POWER FAIL
H DET
SIRCS IN
STEREO DET
SW1 SIRCS OUT
BUZZER
N.C
ARC_LED
SCK 0
SI 0
SO 0
EEP WP
LANC IN
LANC OUT
A/D 0
A/D 1
A/D 2
A/D 3
A/D 4
ML LED
X CS
AFT
AVDD
AV REF
SCL 0
CG CS
SDA 0
JOG LED
AVSS
EXTAL
XTAL
VSS
RST
PLL CLK
PLL DATA
PLL ENABLE
MAIN/SAP
SAP DET
V SET CS
DMS 1
DMS 2
VFDP
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
I/O
O
I
I
I
I
O
O
O
I
I
O
O
I
O
I
I
I
I
I
O
O
I
I
O
O
O
O
I
I
I
O
O
O
O
I
O
I
I
I
O
O
O
O
O
O
O
Function
During Laser Link signal resived “H”.
Power failure detect signal input.
H DET_(Tuner Hsync detect input).
Remote control signal input.
Stereo judge input.
Remote control signal output.
Buzzer signal output.
Not used.
ARC led control “H” when ARC on.
Serial communication signal (clock).
Serial communication signal
(data in).
Serial communication signal
(data out).
EEP mode control.
LANC input.
LANC output.
Analog voltage (key) input.
Analog voltage (key) input.
Analog voltage (key) Input.
Analog voltage (key) Input.
Analog voltage (key) Input.
ML LED ON/OFF control.
Memory label board chip select
signal out.
Auto fine tuning signal input.
A/D port reference input.
UNSW 5 V.
T BUS (clock) /IIC BUS (clock).
Character generator chip select
signal.
IIC BUS (data).
JOG LED control signal output.
Ground.
System clock terminal (16 MHz).
System clock terminal (16 MHz).
Ground.
RESET input.
TUNER PLL clock.
TUNER PLL data.
TUNER chip select.
Main/SAP judge signal output.
Main/SAP judge signal input.
Vset IC chip select signal.
DMS forward/reverse signal input.
DMS forward/reverse signal input.
VFDP.
Segment terminal 1
Segment terminal 2
Segment terminal 3
Segment terminal 4
Segment terminal 5
Segment terminal 6
Segment terminal 7