MHC-V7D
73
Pin No.
Pin Name
I/O
Description
61
DQM0
O
Data mask signal output to the SD-RAM
62 to 69
RD15 to RD8
I/O
Two-way data bus with the SD-RAM
70
DQM1
O
Data mask signal output to the SD-RAM
71
DVDD33
-
Power supply terminal (+3.3V) (for digital system)
72
RCLK
O
Clock signal output to the SD-RAM
73 to 79
RA11, RA9 to RA4
O
Address signal output to the SD-RAM
80
RWE#
O
Write enable signal output to the SD-RAM
81
DVSS12
-
Ground terminal (for digital system)
82
CAS#
O
Column address strobe signal output to the SD-RAM
83
RAS#
O
Row address strobe signal output to the SD-RAM
84
DVDD33
-
Power supply terminal (+3.3V) (for digital system)
85
BA0
O
Bank address signal output to the SD-RAM
86
BA1
O
Bank address signal output to the SD-RAM
87
DVDD12
-
Power supply terminal (+1.2V) (for digital system)
88 to 92
RA10, RA0 to RA3
O
Address signal output to the SD-RAM
93
SPDIF
-
Not used
94
XMAMUTE
-
Not used
95
NC
-
Not used
96
DACVDDC
-
Power supply terminal (+3.3V) (for D/A converter)
97
VREF
I
Band gap reference voltage terminal
98
FS
I
Full scale adjustment terminal
99
DACVSSC
-
Ground terminal (for D/A converter)
100
CVBS
O
Composite video signal output terminal
101
DACVDDB
-
Power supply terminal (+3.3V) (for D/A converter)
102
SY/Y/G
-
Not used
103
SC/CB/B
-
Not used
104
CR/R
-
Not used
105
AADVSS
-
Ground terminal (for A/D converter)
106
ADIN
I
Audio data input from the A/D converter (for USB)
107
NC
-
Not used
108
NC
-
Not used
109
AADVDD
-
Power supply terminal (+3.3V) (for A/D converter)
110
ADACVSS2
-
Ground terminal (for A/D converter)
111
ADACVSS1
-
Ground terminal (for A/D converter)
112
ACLK
O
Master clock signal output
113
ABCK
O
Bit clock signal output
114
NC
-
Not used
115
AVCM
I
Audio D/A converter reference voltage terminal
116
NC
-
Not used
117
ALRCK
O
L/R sampling clock signal output
118
ASDATA0
O
Audio data output
119
ADACVDD1
-
Power supply terminal (+3.3V) (for D/A converter)
120
ADACVDD2
-
Power supply terminal (+3.3V) (for D/A converter)
121
AVDD12_1
-
Power supply terminal (+1.2V) (for analog system)
122
AGND12
-
Ground terminal (for analog system)
123
RFIP
I
AC coupled RF signal input from the optical pick-up block
124
OPDIST
I
Optical pick-up block type selection
125
IOPMON/OPO
I
Power monitor terminal
126
SPFG/OP-
I
Spindle motor hall sensor input from the motor driver
127
RF_A
I
RF main beam A input from the optical pick-up block
128
RF_B
I
RF main beam B input from the optical pick-up block
Summary of Contents for MHC-V7D
Page 103: ...MEMO MHC V7D 103 Ver 1 1 ...