Sony Ipela SNC-CS50N, Service Manual

Page: 61 / 76

7-7
SNC-CS50N/CS50P
7-7
2
3
4
5
1
A B C D E F G H
SY-337 (3/10) SY-337 (3/10)
SY-337 (3/10)
111 G2 DOC32MB
001 G3 DOC64MB
HWVR[2:0]=000 G2 DOC64MB
SELF RESET
FACTORY RESET
MEMORY STICK
BOOT MODE / ENDIAN
ARM ICE
CPU PO RESET
SYSTEM RESET
ARM_SDCLK
ARM_JTAG_TDI
D/N-TIME
D/N-LEVEL
WB_MODE2
WB_MODE1
D/N-MODE
ARM_DTACK
HWVR1
HWVR2
HWVR0
HWVR1
HWVR2
HWVR0
LED2
ARM_SDCKE1
H:NTSC
SEC_CLK
ARM_JTAG_TDO
ARM_JTAG_TCK
ARM_JTAG_TMS
ARM_JTAG_TRST
ARM_CS4
ARM_CS5
RTC_RST
RTC_DATA
DIP_SW0
DIP_SW1
DIP_SW2
LED0
ALARM_IN1
DMA_DREQ
UART2_TXD
UART1_TXD
ARM_CS0
ARM_CS1
ARM_CSD0
ARM_CSD1
ARM_CAS ARM_RAS
ARM_MA10
ARM_SDCKE0 ARM_DQM0
ARM_RW
ARM_CSD1
ARM_EB0
ARM_EB3 ARM_CS4
ARM_EB1
ARM_EB1
ARM_OE
ARM_EB2
ARM_EB0
ARM_RW
ARM_EB3
ARM_CLKO
ARM_SDWE
ARM_DQM2
ARM_MA11
ARM_CS0
ARM_CS1
ARM_CSD0
ARM_CS5
ARM_OE
ARM_EB2
UART1_RXD
ARM_ENDIAN
ARM_BOOT0
SEC_RST
ONE_PUSH_TRG
UART2_RXD
SEC_TX
EXT_IN
CCD-IRIS
AGC
SIFSEL
EXT_OUT
ARM_BOOT1
ARM_BOOT1
ARM_BOOT2
ARM_BOOT2
ARM_ENDIAN
ARM_BOOT0
ALARM_OUT0
ALARM_OUT1
ALARM_IN0
ARM_JTAG_TMS
ARM_JTAG_TDO
ARM_JTAG_TCK
ARM_JTAG_TDI
ARM_JTAG_TRST
LED1
DIP_SW3
DIP_SW2
DIP_SW1
DIP_SW0
ARM_D2
ARM_DQM3
ARM_DQM1
DIP_SW3
RTC_CLK
ARM_D14 ARM_D21
ARM_D7
ARM_D4
ARM_D1
ARM_D19
ARM_D17
ARM_D15
ARM_D20
ARM_D23
ARM_D26
ARM_D3
ARM_D6 ARM_D10 ARM_D11 ARM_D13 ARM_D18 ARM_D24 ARM_D25 ARM_D28 ARM_D29 ARM_D0 ARM_D5 ARM_D8 ARM_D9 ARM_D12 ARM_D16 ARM_A11 ARM_D22 ARM_D27
ARM_D30
ARM_D31
ARM_A16
ARM_A19
ARM_A6
ARM_A0
ARM_A9 ARM_A14 ARM_A1 ARM_A7 ARM_A17
ARM_A21
ARM_A2
ARM_A3
ARM_A4
ARM_A5
ARM_A8
ARM_A10
ARM_A12
ARM_A13
ARM_A15
ARM_A18
ARM_A20
ARM_A22
ARM_A23
ARM_A24
C217
18pF
C222
15pF
C201
10uF
R221 47k
R22047k
R219 47k
JC205
0
NM
JC204
0
DGND
+3.3V-1
5
VCC 4
Y
3
GND
1
B
2
A
NM
IC206
TC7SZ08AFE
L201
10uH
DGND
R342
47k
R201
100k
CL206
DGND
DGND
DGND
DGND
DGND
NM
JC203
0
JC202
0
JC201
0
CL204
R286
10k
R285
10k
R238 10k
R239 10k
R240
10k
DGND
008 CAMERA_CONTROL
DGND
DGND
D202
MA111-TX
D201
MA111-TX
DGND
DGND
DGND
DGND
+1.8V-1
+1.8V-1
DGND
+3.3V-1
2
3Y
5
2Y
3
2A
7
1Y
8
VCC
4
GND
6
3A
1
1A
IC204
TC7WH14FK(TE85R)
003,005,006,007
ARM_RESET_OUT
8 7
6 5
4 3
2 1
S202
C226
10uF
C206
10uF
C203
10uF
NM
R339
10k
NM
R340
10k
R341
10k
R213
10M
C216
0.1uF
C219
0.1uF
C221
0.1uF
C224
0.1uF
C225
0.1uF
Q201
DTC114EUA-T106
R242
10k
R267
10k
C232
1uF
3
G1
1
4
2
S203
R307 22
001 ARM_DSP_RESET
5
VCC 4
Y
3
GND
1
B
2
A
IC205
TC7SH08FU(T5RSOYJF)
C233
0.1uF
5
VCC 4
Y
3
GND
1
B
2
A
IC203
TC7SH08FU(T5RSOYJF)
GND 12
GND 11
GND 10
SRST 9
TDO 8
14
RTCK 7
13
TCK 6
TMS 5
TDI 4
TRST 3
VCC 2
VCC 1
CN201
008,009 ARM_PERI
R313
22
004 FLASH_BUSY
006 INIT_DONE
E201
FB201
0.1uF
C228
0.1uF
C227
001 DSP_HINT
006 FPGA_INTR
C202
0.1uF
C231
0.1uF
C230
0.1uF
R257
22
R300 22
R226
22
004 ARM_SDRAM_CTL
R268
2
2
R287
22
R288
22
004,005,006,010 ARM_CTL
R309
10k
R315
10k
R310
10k
R311
10k
R316
10k
R314
10k
006 ARM_CLKO
R337 1k
NM
R3341k
NM
R332
10k R331
10k
R237
1k
R335 1k
NM
R336 1k
R306 1k
NM
R244
10k
R245
0
R248
10k R258
10k
R262
10k
R263
10k
NM
R274
10k
R275
0
1.0
CL203
R278
10k
R280
10k
R293 10k
R294 10k
R295 100k
1.0
CL205
R318
10k
R319
0
R302 10k
R301 0
R303
0
R304
100k
R305 100k
R282
10k
R279
10k
R277
10k
R272
100k
R270
100k
NM
R217
10k
R218
0
R225
10k
R224
10k
R222
100k
1.0
CL202
1.0
CL201
R266
10k
R326
10k
R317
10k
R320
10k 10k 10k 10k 10k
R321 R327 R322
R324
R269
22
R323
10k
R276
10k
R260
10k
R247
10k
R281
10k
R299 10k
R284
0
NM
R283
10k
R265
0
NM
R264
10k
NM
R249
10k
R250
0
R216
0
NM
R215
10k
R328
10k
R312
10k
001,008 VDEC_VSYNC
001,008 VDEC_FID
R325
10k
R210
10k
R207
10k
R212
10k
R296 10k
R256
10k
NM
R330
10k
R329
10k
R241
150k
C229
4.7uF
R255
0
003,005,006,007
ARM_RESET_OUT
R254
0
R246
10k
R243
0
004,008 DOC_BUSY
R205
0
004,008
RESET
R204
10k
R203
470k
R202
220k
5
GND
4
2
3
1
S201
4
PFI
1
RESET
5
PFO
3
MR
6
VDD
2
GND
IC201
TPS3103K33DBVR
005,006 LAN_INTR
004,006,008 DOC_INTR
R208
10k
R209
10k
R211
10k
8
7
6
5
4
3
2
1
RB201
10k
X201
0.032768MHz
R261
22
R289
22
R291
22
R292
22
R308
22
R297 22
R290
22
R259
22
R253
22
R252
22
R251
22
R236 22
R235 22
R234 22
R233 22
R232 22
R231 22
R230 22
R229 22
R228 22
R227
22
0.1uF
C223
0.1uF
C220
0.1uF
C218
0.1uF
C215
0.1uF
C213
0.1uF
C211
0.1uF
C209
0.1uF
C214
0.1uF
C212
0.1uF
C210
0.1uF
C208
0.1uF
C207
0.1uF
C205
0.1uF
C204
004,010 ARM_D
004,010
ARM_A
256
QVDD1[H9]
255
VSS17[J9]
254
NVDD1_8[J8]
253
VSS16[H8]
252
UART1_CTS[G8]
251
SPI1_MOSI[G9]
250
BT9[G10]
249
PS[H10]
248
VSS15[J10]
247
NVDD2_2[K10]
246
NVDD2_1[K9]
245
NVDD1_7[K8]
244
VSS14[K7]
243
VSS13[J7]
242
VSS12[H7]
241
SIM_CLK[G7]
240
UART2_TXD[F7]
239
SSI_TXFS[F8]
238
SPI1_MISO[F9]
237
BT10[F10]
236
BT2[F11]
235
CLS[G11]
234
LD0[H11]
233
LD6[J11]
232
LD10[K11]
231
PWMO[L11]
230
TIN[L10]
229
TCK[L9]
228
CAS[L8]
227
VSS11[L7]
226
NVDD1_6[L6]
225
VSS10[K6]
224
NVDD1_5[J6]
223
NVDD1_4[H6]
222
SIM_RX[G6]
221
SIM_RST[F6]
220
USBD_VM[E6]
219
UART2_RTS[E7]
218
SSI_TXDAT[E8]
217
SPI1_SS[E9]
216
BT12[E10]
215
BT4[E11]
214
NC8[E12]
213
REV[F12]
212
CONTRAST[G12]
211
LD2[H12]
210
LD7[J12]
209
LD12[K12]
208
CSI_MCLK[L12]
207
CSI_D4[M12]
206
BIG_ENDIAN[M11]
205
RESET_IN[M10]
204
RAS[M9]
203
MA10[M8]
202
RW[M7]
201
VSS9[M6]
200
SDCLK[M5]
199
D14[L5]
198
NVDD1_3[K5]
197
NVDD1_2[J5]
196
NVDD1_1[H5]
195
D21[G5]
194
A16[F5]
193
SD_DAT2[E5]
192
USBD_SUSPND[D5]
191
USBD_VPO[D6]
190
USBD_VMO[D7]
189
SSI_RXDAT[D8]
188
SPI1_SPI_RDY[D9]
187
BT13[D10]
186
BT6[D11]
185
NC7[D12]
184
NC6[D13]
183
NC5[E13]
182
PY1[F13]
181
ACD/OE[G13]
180
LD4[H13]
179
LD8[J13]
178
LD13[K13]
177
CSI_D0[L13]
176
CSI_HSYNC[M13]
175
CSI_PIXCLK[N13]
174
BOOT2[N12]
173
RESET_OUT[N11]
172
RESET_SF[N10]
171
DQM1[N9]
170
D1[N8]
169
PA17[N7]
168
D4[N6]
167
A0[N5]
166
D7[N4]
165
A6[M4]
164
D15[L4]
163
D17[K4]
162
D19[J4]
161
D20[H4]
160
D23[G4]
159
A19[F4]
158
D26[E4]
157
SIM_SVEN[D4]
156
SIM_PD[C4]
155
USBD_RCV[C5]
154
UART2_CTS[C6]
153
UART2_RXD[C7]
152
SSI_RXFS[C8]
151
UART1_TXD[C9]
150
BTRFGND[C10]
149
BT8[C11]
148
BTRFVDD[C12]
147
NC4[C13]
146
AVDD2[C14]
145
NC3[D14]
144
PY2[E14]
143
PX1[F14]
142
LP/HSYNC[G14]
141
LD5[H14]
140
LD11[J14]
139
LD14[K14]
138
CSI_D1[L14]
137
CSI_VSYNC[M14]
136
CSI_D7[N14]
135
I2C_SCL[P14]
134
TRST[P13]
133
BOOT0[P12]
132
BOOT3[P11]
131
SDCKE1[P10]
130
DQM3[P9]
129
D3[P8]
128
D2[P7]
127
ECB[P6]
126
D6[P5]
125
CS3[P4]
124
EB0[P3]
123
D10[N3]
122
D11[M3]
121
D13[L3]
120
A9[K3]
119
D18[J3]
118
A14[H3]
117
D24[G3]
116
D25[F3]
115
D28[E3]
114
D29[D3]
113
SD_DAT0[C3]
112
SD_CMD[B3]
111
SIM_TX[B4]
110
USBD_OE[B5]
109
USBD_VP[B6]
108
SSI_RXCLK[B7]
107
SSI_TXCLK[B8]
106
SPI1_SCLK[B9]
105
BT11[B10]
104
BT7[B11]
103
BT1[B12]
102
VSS8[B13]
101
RVM[B14]
100
UIN[B15]
99
VSS7[C15]
98
R1A[D15]
97
PX2[E15]
96
LSCLK[F15]
95
FLM/VSYNC[G15]
94
LD9[H15]
93
QVDD3[J15]
92
TMR2OUT[K15]
91
CSI_D2[L15]
90
CSI_D6[M15]
89
TMS[N15]
88
I2C_SDA[P15]
87
QVDD2[R15]
86
TDO[R14]
85
BOOT1[R13]
84
POR[R12]
83
SDCKE0[R11]
82
DQM0[R10]
81
D0[R9]
80
BCLK[R8]
79
LBA[R7]
78
D5[R6]
77
D8[R5]
76
CS4[R4]
75
A1[R3]
74
EB3[R2]
73
D9[P2]
72
EB1[N2]
71
D12[M2]
70
A7[L2]
69
D16[K2]
68
A11[J2]
67
D22[H2]
66
A17[G2]
65
D27[F2]
64
A21[E2]
63
D30[D2]
62
D31[C2]
61
SD_DAT1[B2]
60
SD_DAT3[A2]
59
SD_CLK[A3]
58
VSS6[A4]
57
USBD_AFE[A5]
56
NVDD4[A6]
55
VSS5[A7]
54
UART1_RTS[A8]
53
UART1_RXD[A9]
52
NVDD3[A10]
51
BT5[A11]
50
BT3[A12]
49
QVDD4[A13]
48
RVP[A14]
47
UIP[A15]
46
NC2[A16]
45
NC1[B16]
44
R1B[C16]
43
R2B[D16]
42
R2A[E16]
41
SPL_SPR[F16]
40
LD1[G16]
39
LD3[H16]
38
VSS4[J16]
37
LD15[K16]
36
CSI_D3[L16]
35
CSI_D5[M16]
34
TDI[N16]
33
XTAL32K[P16]
32
EXTAL32K[R16]
31
VSS3[T16]
30
XTAL16M[T15]
29
EXTAL16M[T14]
28
TRISTATE[T13]
27
AVDD1[T12]
26
CLKO[T11]
25
SDWE[T10]
24
DQM2[T9]
23
MA11[T8]
22
CS0[T7]
21
CS1[T6]
20
CS2[T5]
19
CS5[T4]
18
OE[T3]
17
A2[T2]
16
VSS2[T1]
15
EB2[R1]
14
A3[P1]
13
A4[N1]
12
A5[M1]
11
A8[L1]
10
A10[K1]
9
A12[J1]
8
A13[H1]
7
A15[G1]
6
A18[F1]
5
A20[E1]
4
A22[D1]
3
A23[C1]
2
A24[B1]
1
VSS1[A1]
IC202
MC9328MX1DVM20