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46
HCD-GSX75
7-20.
IC Pin Function Description
• IC104 TC94A20F-CX4 D/A Converter, MP3 Decoder (CD Board)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 to 34
35
36
37
38
39
40
41
42
43
44
45
46, 47
48
49, 50
51
52
53
54
55
I/O
I
I
I
I
I/O
I
O
–
O
O
O
I
I
I
I
I
I
–
I
–
–
–
O
–
–
O
–
–
I
O
O
–
O
O
O
O
–
I
–
I
I
–
I
–
I
I
–
I
I
I
Pin Name
RESET
MIMD
MICS/AD0
MILP/AD1
MIDIO
MICK
MIACK/AD2
VDDT
SDO
BCKO/AD3
LRCKO/AD4
SDI0
BCKIA
LRCKIA
SDI1/AD5
BCKIB/CE
LRCKIB/OE
VDD
STANDBY
VSS
VSSL
VRAL
LO
VDAL
VDAR
RO
VRAR
VSSR
TESTP
CSK
PO0/AD12 to PO3/AD09
VDDT
PO4/AD8
PO5/AD7
PO6/AD6
PO7
VSS
FI0/AD13
FI1/AD14/VDDM
FI2/WR
FI3/AD16
VSSM
PI0, PI1
VSS
PI2/IO2, PI3/IO3
PI4/IO4
VDD
PI5/IO5
BOOT/IO6
TXO/IO7
Description
Reset input terminal “L”: reset
Microcomputer interface mode selection input “H”: I2C, “L”: TSB
Microcomputer interface chip select signal input
Microcomputer interface latch pulse input
Serial data input/output
Serial clock input
Microcomputer interface acknowledge signal output
Power supply (3.3V) for digital circuit
Data output (open)
Bit output (open)
LR clock output (open)
Data input 0
Bit clock input A
LR clock input A
Data input 1 (fixed at “L”)
Bit clock input B (fixed at “L”)
LR clock input B (fixed at “L”)
Power supply (2.5V) for digital circuit
Standby mode control signal input “H”: STB, “L”: normal (fixed at “L”)
Ground for digital circuit
Ground for DAC Lch
Reference voltage terminal for DAC Lch
DAC Lch signal output
Power supply (2.5V) for DAC Lch
Power supply (2.5V) for DAC Rch
DAC Rch signal output
Reference voltage terminal for DAC Rch
Ground for DAC Rch
Terminal for test “H”: test mode, “L”: normal (fixed at “L”)
SPDIF signal output (open)
General purpose output (open)
Power supply (3.3V) for digital circuit
General purpose output (open)
General purpose output (open)
General purpose output (open)
Interrupt request signal output to the system control (IC801)
Ground for digital circuit
External interrupt signal input (fixed at “L”)
Power supply (2.5V) for the internal 1Mbit SRAM
Flag signal input 0 (fixed at “L”)
Flag signal input 1 (fixed at “L”)
Ground for the internal 1Mbit SRAM
General purpose input (fixed at “L”)
Ground for digital circuit
General purpose input (fixed at “L”)
General purpose input (fixed at “L”)
Power supply (2.5V) for digital circuit
General purpose input/SUBQ interface data input (fixed at “L”)
Terminal for test/SUBQ interface frame sync input (fixed at “L”)
Flag signal input 2/SUBQ interface block sync input (fixed at “L”)