![background image](http://html.mh-extra.com/html/sony/hcd-dx10/hcd-dx10_service-manual_420625031.webp)
31
HCD-DX10/RG4SR/RG20/RG30T
5-16. IC BLOCK DIAGRAMS
IC731 LA9241M (CD BOARD)
IC751 LC78622NE (CD BOARD)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
64
VCC1
LDS
LDD
BHI
PHI
LF2
VR
REFI
VCC2
FSS
DRF
CE
DAT
CL
CLK
DEF
FD-
FA
FA-
FE
FE-
SL-
SL+
AGND
SP
SPI
SPG
SP-
SPD
SLEQ
SLD
JP-
NC
TBC
FSC
DGND
SLI
SLC
RFS-
RFSM
CV+
CV-
SLOF
HFL
TES
TOFF
TGL
JP+
FIN2
FINI
E
F
TB
TE-
TE
TESI
SCI
TH
TA
TD-
TD
JR
TO
FD
62
61
60
59
55 54 53 52 51 50
49
48
47
46
45
44
43
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
42
58
57
56
RF DET
I / V
VCA
VCA
LSC
RF AMP
BAL
TE
T. SERVO & T. LOGIC
F. SERVO & F. LOGIC
SPINDLE SERVO
SLED SERVO
∝
-COM
INTERFACE
APC
REF
+ -
+
-
+
-
+
-
+ -
+ -
+ -
- +
+ -
63
15
HFL
16
TES
17
T
OFF
20
JP-
19
JP+
58
RES
18
TGL
34
PCCL
24
CONT1
25
CONT2
26
CONT3
27
CONT4
28
CONT5
29
EMPH/CONT6
48
EFLG
60
16M
61
4.2M
46
XVSS
52
FSX
45
XIN
44
XOUT
43
XVDD
39
R
VSS
41
R
VDD
42
MUTER/CONT8
40
RCHO
37
LCHO
35
MUTEL/CONT7
38
LVSS
36
LVDD
Servo
command
General-purpose
ports
Crystal oscillator system
Timing generation
L.P.F
1-bit DAC
54
RWC
56
COIN
57
CQCK
55
SQOUT
53
WRQ
63
CS
50
SFSY
47
SBSY
51
SBCK
49
PW
14
V/P
13
CLV-
12
CLV+
22
FSEQ
10
EFMIN
1
DEFI
Microprocessor
interface
Subcode
separation
QCRC
CLV digital
servo
Synchronization
detection
EFM demoduration
Slice level
control
8x oversampling
digital filters
Digital
attenuator
Digital
output
Bilingual
Interpolation
and muting
31 DOUT
30 C2F
C1 and C2 error detection
and correction
Flag processing
9
EFMO
VCO clock oscillator
Clock control
2k x 8-bit RAM
RAM address
generator
6
VVDD
4
VVSS
3
PDO
5
ISET
7
FR
21
PCK
2
TA
I
59
TST11
64
TEST1
11
TEST2
32
TEST3
33
TEST4
62
TEST5
23
VDD
8
VSS