52
HCD-DP700
53
CLTV
I
Control voltage input for master VCO.
54
FILO
O
Filter output for master PLL.
55
FILI
I
Filter input for master PLL.
56
PCO
O
Chage-pump output for master PLL.
57
AVDD3
—
Analog powr supply.
58
VSS
—
Ground.
59
VDD
—
Power supply.
60
DOUT
O
Not used.
61
LRCK
O
Not used.
62
PCMD
O
Not used.
63
BCK
O
Not used.
64
EMPH
O
Not used.
65
XVDD
—
Master clock power supply.
66
XTAI
I
X’tal oscillator circuit input.
67
XTAO
O
X’tal oscillator circuit output.
68
XVSS
—
Master clock ground.
69
AVDD1
—
Analog power supply.
70
AOUT1
O
Lch : Analog output.
71
AIN1
I
Lch : OPAMP input.
72
LOUT1
O
Lch : LINE output
73
AVSS1
—
Analog ground.
74
AVSS2
—
Analog ground.
75
LOUT2
O
Rch : LINE output.
76
AIN2
I
Rch : OPAMP input.
77
AOUT2
O
Rch : Analog output.
78
AVDD2
—
Analog power supply.
79
RMUT
O
Not used.
80
LMUT
O
Not used.
Function
Pin Name
Pin No.
I/O