5-2
DVP-NS30/NS32/NS33/NS52P
Pin No.
Pin name
Type
Function
50
OCSW
Input
Servo GPIO 1
51
EEWP
Output
EEPROM write Protect Control
52
DVDD18
Power
1.8V power pin for internal digital circuitry
53
HA2
Output PU
Host address bit2
54
HA3
Output PU
Host address bit3
55
HA4
Output PU
Host address bit4
56
HA5
Output PU
Host address bit5
57
HA6
Output PU
Host address bit6
58
HA7
Output PU
Host address bit7
59
HA8
Output PU
Host address bit8
60
HA18
Output SMT
Host address bit18
61
HA19
Output SMT
Host address bit19
62
DVSS
Ground
Ground pin for internal digital circuitry
63
APLLCAP
Analog Input
APLL External Capacitance connection
64
APLLVSS
Ground
Ground pin for audio clock circuitry
65
APLLVDD3
Power
3.3V power for audio clock circuitry
66
xWR
Output SMT
Write enable, active Low
67
HA16
Output
Host address bit16
68
HA15
Output PU
Host address bit15
69
HA14
Output PU
Host address bit14
70
HA13
Output PU
Host address bit13
71
HA12
Output PU
Host address bit12
72
HA11
Output PU
Host address bit11
73
DVDD3
Power
3.3V power pin for internal digital circuitry
74
HA10
Output PU
Host address bit10
75
HA9
Output PU
Host address bit9
76
HA20
Output SMT
Host address bit20
77
xROMCS
Output PU, SMT
Chip select, active Low
78
HA1
Output PU
Host address bit1
79
xRD
Output SMT
Read enable, active Low
80
DVDD3
Power
3.3V power pin for internal digital circuitry
81
HD0
Output
Host data bit0
82
HD1
Output
Host data bit1
83
HD2
Output
Host data bit2
84
HD3
Output
Host data bit3
Ground pin for internal digital circuitry
Host data bit4
Host data bit5
Host data bit6
Output SMT
Host data bit21
Output PU,SMT
Address latch enable
Host data bit7
Host address bit17
Host address bit0
94
DVSS
Ground
Ground pin for internal digital circuitry
95
UWR#
Output PU,SMT
8032 write strobe
96
URD#
Output PU,SMT
8032 read strobe
97
DVDD18
Power
1.8V power pin for internal digital circuitry
Output PU,SMT
98
IFSDO
Default High
Ext. CPU Serial data output (H/W method)
Output PU,SMT
99
IFCK
Default High
Ext. CPU Serial clock (H/W method)
Output PU,SMT
100
xIFCS
Default High
Chip select for Ext.CPU (Low Active, H/W method)
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