5-53
Confidential
DMP-1000P (AEP)
5-23.
IC PIN FUNCTION DESCRIPTION
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DK-39E BOARD IC407 F432301PGF (A/D, D/A CONVERTER, MEMORY BUS CONTROL)
Pin No.
Pin Name
I/O
Description
1
MDT15
I/O
Two-way data bus with the D-RAM (IC403) (upper 8 bit)
2
DGND
—
Ground terminal (logic system)
3
DVCC
—
Power supply terminal (+5V) (logic system)
4, 5
MAD11, MAD10
O
Address signal output terminal Not used (open)
6 to11
MAD9 to MAD4
O
Address signal output to the D-RAM (IC403)
12
DGND
—
Ground terminal (logic system)
13 to16
MAD3 to MAD0
O
Address signal output to the D-RAM (IC403)
17
DGND
—
Ground terminal (logic system)
18
DVCC
—
Power supply terminal (+5V) (logic system)
19
SC
O
Sub carrier output terminal Not used (open)
20
SYCX
O
Composite sync signal output to the CXA1229M (IC103)
21
DVCC
—
Power supply terminal (+5V) (logic system)
22
DGND
—
Ground terminal (logic system)
23
AGND
—
Ground terminal (D/A converter, analog system)
24
BIAS1
I/O
Bias control terminal of the D/A converter
25
COMP1
I/O
Comparator in/out terminal of the D/A converter
26
VREF1
I
Reference voltage (+3V) input terminal
Used for the D/A output level adjustment of luminance signal (Y signal)
27
IREF1
I/O
Reference current control terminal
28
AVCC
—
Power supply terminal (+5V) (D/A converter, analog system)
29
Y OUT
O
Analog Y signal output terminal (luminance signal output terminal)
30
AGND
—
Ground terminal (D/A converter, analog system)
31
BIAS2
I/O
Bias control terminal of the D/A converter
32
COMP2
I/O
Comparator in/out terminal of the D/A converter
33
VREF2
I
Reference voltage (+3V) input terminal
Used for the D/A output level adjustment of chroma signal
34
IREF2
I/O
Reference current control terminal
35
AVCC
—
Power supply terminal (+5V) (D/A converter, analog system)
36
U OUT
O
Analog U signal output terminal (B-Y color difference signal output terminal)
37
AGND
—
Ground terminal (D/A converter, analog system)
38
BIAS3
I/O
Bias control terminal of the D/A converter
39
COMP3
I/O
Comparator in/out terminal of the D/A converter
40
VREF3
I
Reference voltage (+3V) input terminal
Used for the D/A output level adjustment of chroma signal
41
IREF3
I/O
Reference current control terminal
42
AVCC
—
Power supply terminal (+5V) (D/A converter, analog system)
43
V OUT
O
Analog V signal output terminal (R-Y color difference signal output terminal)
44
DGND
—
Ground terminal (logic, digital system)
45
TI CHK
I
Test input terminal (normally: fixed at “L”)
46
LDX
I
Test input terminal (normally: fixed at “L”)
47
RESV
I
Reset signal input for the internal SG V “H”: reset Not used (fixed at “L”)
48
SYET
O
Sync selection signal output at external reading Not used (open)
49
EXET
O
Internal/external selection signal output terminal Not used (open)
50
CGEEX
O
EE, WR/READ select signal output to the video input circuit (IC101, 102) and Y/C separator
(IC105)
51
RESX
I
System reset signal input from the reset signal generator (IC501) “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”