Sony BVP-950 Series, Maintenance Manual

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2-13
BVP-950
BVP-950P
IC
C-MOS SRAM
—TOP VIEW—
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
OE
IN
A11
IN
A9
IN
A8
IN
A13 IN
WE
IN
A14
IN
A12
IN
A7
IN
A6
IN
A5
IN
A4
IN
A3
IN
A10
IN
CS
IN
I/O7
I/O
I/O6
I/O
I/O5 I/O
I/O4
I/O
I/O3
I/O
I/O2
I/O
I/O1
I/O
I/O0
I/O
A0
IN
A1
IN
A2
IN
NC
GND
NC
NC
V
DD( + 3V)
NC
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A0 - A14
CS
I/O0 - I/O7
OE
WE
; ADDRESS INPUTS
; CHIP SELECT INPUT
; DATA INPUTS/OUTPUTS
; OUTPUT ENABLE INPUT
; WRITE ENABLE INPUT
20
18
17
16
15
13
12
11
5
4
32
2
10
6
9
31
1
7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
CS
OE
WE
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
21
22
23
25
26
27
28
29
0
1 ; LOW LEVEL
; HIGH LEVEL
X ; DON'T CARE
; HIGH IMPEDANCE
HI-Z
CS
1
0
0
0
0
OE
X
1
0
1
0
WE
X
1
1
0
0
MODE
NO SELECTION
OUTPUT DISABLE
READ
WRITE
WRITE
I/O PIN
HI-Z
HI-Z
D
OUT
D
IN
D
IN
1 GND
2
3
4
5
6
7
8
9
10
11
12
17
16
15
14
11
10
9
13
8
1
18
7
4
21
5
A0
A1
A2
A3
A4
A5
A6
A7
RAS
CAS
WE
DT/OE
SOE
I/O1
A0 - A7
CAS
DT/OE
I/O1 - I/O4
RAS
SC
SI/O1 - SI/O4
SOE
WE
; ADDRESS INPUT
; COLUMN ADDRESS STROBE INPUT
; DATA TRANSMISSION/OUTPUT ENABLE INPUT
; RAM PORT DATA INPUT/OUTPUT
; ROW ADDRESS STROBE INPUT
; SERIAL CLOCK INPUT
; SAM PORT DATA INPUT/OUTPUT
; SAM PORT ENABLE INPUT/OUTPUT
; WRITE ENABLE INPUT
I/O2
I/O3
I/O4
SI/O1
SI/O2
SI/O3
SI/O4
6
19
20
2
3
22
23
24
PIN
No.
23
22
21
20
19
18
17
16
15
14
13 V
CC( + 5V)
1
2
3
4
5
6
7
8
9
10
11
12
I/O
—
I/O
I/O
—
I/O
I/O
—
—
I
I
I
—
SIGNAL
SC
SI/O1
SI/O2
DT/OE
I/O1
I/O2
WE
RAS
A6
A5
A4
V
CC
SIGNAL
A7
A3
A2
A1
A0
CAS
I/O3
I/O4
SOE
SI/O3
SI/O4
GND
PIN
No.
13
14
15
16
17
18
19
20
21
22
23
24
I/O
I
I
I
I
I
—
I/O
I/O
—
I/O
I/O
—
C-MOS 64K WORD
x
4 BIT MULTI PORT RAM
—TOP VIEW—
HM53461JP-12 (HITACHI)CHIP CARRIER(ACCESS TIME=120 ns) HM62V256LT8Z (HITACHI)
I/O BUFFER
SI/O BUFFER
VBB
GENERATOR
SC CLOCK
GENERATOR
SOE CLOCK
GENERATOR
TRANSFER
CONTROL
OE CLOCK
GENERATOR
WRITE MASK
GENERATOR
WE CLOCK
GENERATOR
WE
7
CAS
CAS
SI/O1
18
18
2
SI/O2
3
SI/O3
22
SI/O4
23
RAS
RAS
8
8
A0 - A7
13 - 17, 9 - 11
CAS CLOCK
GENERATOR
RAS CLOCK
GENERATOR
X ADDRESS
BUFFER
Y ADDRESS
BUFFER
REFRESH ADDRESS
COUNTER
Y DECODER
X DECODER
64K x 4
MEMORY
ARRAY
256 x 4 DATA
REGISTER
POINTER
I/O1
5
I/O2
6
I/O3
19
I/O4
20
DT/OE
4
SOE
21
SC
1
ROW
DECODER
(MSB) A12
A5
A7
A6
A8
A13
A14
A4
(LSB) A3
I/O0
I/O7
21 - 23,
25 - 29
29
31
7
1
CS
WE
OE
10
13
11
12
5
6
9
15
16
INPUT
DATA
CONTROL
MEMORY MATRIX
512 x 512
COLUMN I/O
COLUMN DECODER
A2
(LSB)
A1 A0 A10 A9 A11
(MSB)
TIMING PULSE GENERATOR
READ/WRITE CONTROL