22
AVD-S50/S50ES
SECTION 5
DIAGRAMS
5-1. IC PIN FUNCTION DESCRIPTION
• DVD BOARD IC301 CXP973064-233R (MECHANISM CONTROLLER)
Pin No.
Pin Name
I/O
Pin Description
1
EEP SO
O
Not used. (Open)
2
SDEN
O
Serial data enable signal output to DVD/CD RF amplifier
3
DOCTRL/
O
Digital out on/off contrrol signal output to the digital signal processor
ISBTEST
“L”: digital out off, “H”: digital out on
4
EEP WC
O
Not used. (Open)
5
EEP SI
I/O
Two-way data bus with the EEPROM
6
EEP RDY
I
EEPROM ready signal input from the DVD decoder
7
FCS JMP 1
O
Focus jump 1 signal output to the motor/coil driver
8
FCS JMP 2
O
Focus jump 2 signal output to the motor/coil driver
9
SENS CD
I
Internal status (SENSE) signal input from the digital signal processor
10
LOAD +
O
Loading motor drive signal (loading in direction) output terminal Not used. (Open)
11
LOAD –
O
Loading motor drive signal (loading out direction) output terminal Not used. (Open)
12
XCS DVD
O
Chip select signal output to the DVD decoder
13
VSS
—
Ground terminal (digital system)
14 to 21
D0 to D7
I/O
Two-way data bus with the DVD decoder
22
INIT0 DVD
I
Interrupt signal input from the DVD decoder
23
INIT1 DVD
I
Interrupt signal input from the DVD decoder
24
FCOMP H
O
Serial data transfer clock signal output to the DSD decoder
25
FCOMP L
O
Reset signal output to the DVD decoder “L”: reset
26
SCOR
I
Subcode sync (S0+S1) detection signal input from the digital signal processor
27
LAT CD
O
Serial data latch pulse signal output to the digital signal processor
28
LD ON
O
Laser diode on/off control signal output to the DVD/CD RF amplifier
“L”: laser diode off, “H”: laser diode on
29
MIRR
I
Mirror signal input from the digital signal processor
30
COUT CD
I
Numbers of track counted signal input from the digital signal processor
31
INLIM
I
Detection signal input from limit in switch
The optical pick-up is inner position when “H”
32
CS ZIVA
O
Chip select signal output to the DVD system processor
33
SI ZIVA
I
Serial data input from the DVD system processor
34
SO ZIVA
O
Serial data output to the DVD system processor
35
SCK ZIVA
O
Serial data transfer clock signal output to the DVD system processor
36
DRVIRQ
O
Interrupt request signal output to the DVD system processor
37
DRVRDY
O
Ready signal output to the DVD system processor
38
RST
I
System reset signal input from the DVD system processor “L”: reset
39
VSS
—
Ground terminal (digital system)
40
XTAL
I
System clock input terminal (20 MHz)
41
EXTAL
O
System clock output terminal (20 MHz)
42
VDD
—
Power supply terminal (+3.3 V) (digital system)
43, 44
SLED A, SLED B
O
Sled motor drive signal output
45
SCK DSD
O
Output terminal for offset adjustment of APEO
46
SDOUT DSD
O
Serial data output to the DSD decoder
47
SDIN DSD
I
Serial data input from the DSD decoder
48
READY DSD
I
Ready signal input from the DSD decoder “L”: ready
49
DATA CD
O
Serial data output to the digital signal processor
50
CLOK CD
O
Serial data transfer clock signal output to the digital signal processor
51
XMSLAT
O
Serial data latch pulse signal output to the DSD decoder
52
SQSO
I
Subcode Q data input from the digital signal processor
Summary of Contents for AVD-S50
Page 7: ...7 AVD S50 S50ES AVD S50 AVD S50ES ...
Page 8: ...8 AVD S50 S50ES ...
Page 9: ...9 AVD S50 S50ES ...
Page 112: ...112 AVD S50 S50ES MEMO ...
Page 120: ...8 8 AVD S50 S50ES MEMO ...
