Sony AVD-S50, Service Manual

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AVD-S50/S50ES
Pin No. Pin Name I/O Pin Description
122 WRFD I Not used. (Fixed at “L” in this set.)
123 WCK I
Operation clock signal input for PSP physical disc mark detection from the DVD
decoder
124, 125 WAVDD0, WAVDD1 — A/D power supply terminal (+2.5 V) (for PSP physical disc mark detection)
126 WARFI I
Analog RF signal input for PSP physical disc mark detection from the DVD/CD RF
amplifier
127 WAVRB I A/D bottom reference terminal for PSP physical disc mark detection
128, 129 WAVSS1, WAVSS0 — A/D ground terminal (for PSP physical disc mark detection)
130 VSIOA2 — Ground terminal (for I/O)
131 to 134 DQ7 to DQ4 I/O Two-way data bus with the SD-RAM
135 VDIOA2 — Power supply terminal (+3.3 V) (for I/O)
136 to 139 DQ3 to DQ0 I/O Two-way data bus with the SD-RAM
140 VSIOA3 — Ground terminal (for I/O)
141 DCLK O Clock signal output to the SD-RAM
142 DCKE O Clock enable signal output to the SD-RAM
143 XWE O Write enable signal output to the SD-RAM
144 XCAS O Column address strobe signal output to the SD-RAM
145 XRAS O Row address strobe signal output to the SD-RAM
146 VDIOA3 — Power supply terminal (+3.3 V) (for I/O)
147 NC O Not used. (Open)
148, 149 A11, A10 O Address signal output to the SD-RAM
150 VSCA3 — Ground terminal (for core)
151, 152 A9, A8 O Address signal output to the SD-RAM
153 VDCA3 — Power supply terminal (+2.5 V) (for core)
154 to 157 A7 to A4 O Address signal output to the SD-RAM
158 VSIOA4 — Ground terminal (for I/O)
159 to 162 A3 to A0 O Address signal output to the SD-RAM
163 VDIOA4 — Power supply terminal (+3.3 V) (for I/O)
164 XSRQ O Serial data request signal output to the DVD decoder
165 XSHD I Header flag signal input from the DVD decoder
166 SDCK I Serial data transfer clock signal input from the DVD decoder
167 XSAK I Serial data effect flag signal input from the DVD decoder
168 SDEF I Error flag signal input from the DVD decoder
169 to 176 SD0 to SD7 I Stream data signal input from the DVD decoder