7. Recommended Schematic and Layout Practices
The Si5357 schematic and layout design can be referenced from the EVB design for Si5357. For each package, the user’s guide (links
below) outlines the EVB design and provides links to schematic and layout references for each package type.
•
UG301: Si5332-12EX-EVB User's Guide
•
UG300: Si5332-8EX-EVB User's Guide
•
UG299: Si5332-6EX-EVB User's Guide
At the schematic/placement/layout design time, these are the following guidelines:
1. Power supply filtering:
a. The Si5357 can tolerate up to 100 mV (+/-50 mV) of noise for each supply node. The application note,
, provides the performance to be expected with such a noise.
i. As can be seen, this noise can be from a switched mode power supply (which causes noise over a wide band of
frequencies) or can be noise due to some oscillatory behavior from a LDO regulator.
ii. The only filtering needed on each supply node is a 1 μF and a 0.1 μF placed as close as possible to that node.
iii. The Si5357 EVBs have a much larger capacitance on the regulator end, mainly to compensate for the regulator loop so
that there is no oscillatory behavior from the regulators regardless of the voltage supply value set for that regulator. The
regulator supply design on the EVB is not required for Si5357 in system designs.
2. Crystal placement:
a. The crystals should be placed as close as possible to the XA/XB pins. This placement ensures that the crystal oscillator traces
do not cause undue delays and hence, cause either an unusually long crystal start up time or get susceptible to crosstalk and
thereby increase jitter on the output clocks.
Si5357 Reference Manual • Recommended Schematic and Layout Practices
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
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Rev. 0.2 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • July 26, 2021
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