ATA R
EGISTERS
SSD-P
XXX
(I)-3100 D
ATA
S
HEET
S
ILICON
S
YSTEMS
P
ROPRIETARY
This document and the information contained within it is confidential and proprietary to SiliconSystems, Inc.
All unauthorized use and/or reproduction is prohibited.
3100P-06DSR
P
AGE
51
F
EBRUARY
2, 2009
C
YLINDER
L
OW
R
EGISTER
The Cylinder Low register is set by the host to specify the cylinder number low
byte. Following an ATA command, the content of the register is written by the
device, identifying the cylinder number low byte.
In LBA mode, the 8-bit register maintains the contents of the Logical Block
number address bits A15:A08.
Table 38: Cylinder Low Register
Operation
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Read/Write
Cylinder Number Low Byte (CHS Addressing)
Logical Block Number bits A15-A08 (LBA Addressing)
Default Value
0
0
0
0
0
0
0
0