ATA C
OMMAND
B
LOCK
AND
S
ET
D
ESCRIPTION
SSD-P
XXX
(I)-3100 D
ATA
S
HEET
S
ILICON
S
YSTEMS
P
ROPRIETARY
This document and the information contained within it is confidential and proprietary to SiliconSystems, Inc.
All unauthorized use and/or reproduction is prohibited.
3100P-06DSR
P
AGE
67
F
EBRUARY
2, 2009
63
0407h
2
Multiword DMA modes supported
64
0003h
2
PIO modes supported
65
0078h
2
Minimum DMA transfer cycle time per
word (ns)
66
0078h
2
Manufacturer’s recommended DMA
transfer cycle time (ns)
67
0078h
2
Minimum PIO transfer cycle time without
flow control (ns)
68
0078h
2
Minimum PIO transfer cycle time with
IORDY flow controls (ns)
69-127
0000h
118
Reserved
128-159 0000h
64
Vendor-unique
160-255 0000h
192
Reserved
Table 52: Identify Drive — Drive Attribute Data (Continued)
Word
Address
Data Default
Bytes Data Description