Sharp LC-37XD10, Service Manual

Page: 60 / 190

LC-37XD10E/RU
5 – 4
2. IC1905: VHI-1Q
HDMI RECIEVER
Pin No. Pin Name I/O Pin Function
144 Q0 O 24-bit Output Pixel Data Bus. HDMI-B[0]
143 Q1 O 24-bit Output Pixel Data Bus. HDMI-B[1]
142 Q2 O 24-bit Output Pixel Data Bus. HDMI-B[2]
141 Q3 O 24-bit Output Pixel Data Bus. HDMI-B[3]
140 Q4 O 24-bit Output Pixel Data Bus. HDMI-B[4]
137 Q5 O 24-bit Output Pixel Data Bus. HDMI-B[5]
136 Q6 O 24-bit Output Pixel Data Bus. HDMI-B[6]
133 Q7 O 24-bit Output Pixel Data Bus. HDMI-B[7]
132 Q8 O 24-bit Output Pixel Data Bus. HDMI-G[0]
131 Q9 O 24-bit Output Pixel Data Bus. HDMI-G[1]
130 Q10 O 24-bit Output Pixel Data Bus. HDMI-G[2]
129 Q11 O 24-bit Output Pixel Data Bus. HDMI-G[3]
126 Q12 O 24-bit Output Pixel Data Bus. HDMI-G[4]
125 Q13 O 24-bit Output Pixel Data Bus. HDMI-G[5]
124 Q14 O 24-bit Output Pixel Data Bus. HDMI-G[6]
123 Q15 O 24-bit Output Pixel Data Bus. HDMI-G[7]
119 Q16 O 24-bit Output Pixel Data Bus. HDMI-R[0]
118 Q17 O 24-bit Output Pixel Data Bus. HDMI-R[1]
117 Q18 O 24-bit Output Pixel Data Bus. HDMI-R[2]
116 Q19 O 24-bit Output Pixel Data Bus. HDMI-R[3]
113 Q20 O 24-bit Output Pixel Data Bus. HDMI-R[4]
112 Q21 O 24-bit Output Pixel Data Bus. HDMI-R[5]
111 Q22 O 24-bit Output Pixel Data Bus. HDMI-R[6]
110 Q23 O 24-bit Output Pixel Data Bus. HDMI-R[7]
1 DE O Data enable.
2 HSYNC O Horizontal Sync Output control signal.
3 VSYNC O Vertical Syanc Output control signal.
121 ODCK O Output Data Clock. HDMI-CLK
97 XTALIN I Crystal Clock Input.
96 XTALOUT O Crystal Clock Output.
88 MCLKOUT O Audio Master Clock Output.
87 MCLKIN I Audio Master Clock Input Reference.
86 SCK O I2S Serial Clock Output.
85 WS O I2S Word Select Output.
84 SDO O I2S Serial Data Output.
78 SPDIF O S/PDIF Audio Output
77 MUTEOUT O Mute Audio Output.
104 INT O Interrupt Output.
102 RESET# I Reset Pin. Active LOW. 5V Tolerant.
32 DSCL0 I DDC I2C Clock for Port 0. 5V Tolerant.
31 DSDA0 I/O DDC I2C Data for Port 0. 5V Tolerant.
30 DSCL1 I DDC I2C Clock for Port 1. 5V Tolerant.
29 DSDA1 I/O DDC I2C Data for Port 1. 5V Tolerant.
28 CSCL I Configuration I2C Clock. 5V Tolerant.
27 CSDA I/O Configuration I2C Data. 5V Tolerant.
103 SCDT O Indicates active video at HDMI input port.
107 CLK48B I/O Data Bus Latch Enable. 2
34 R0PWR5V I Port 0 Transmitter Detect. 5V Tolerant.
33 R1PWR5V I Port 1 Transmitter Detect. 5V Tolerant.
101 TEST I Test Terminal.
6,7,13,19 VCC - VCC (3.3V).
8, 12, 18 GND - Ground.
10 RSET O Reset Pin.
11 COMP I Comparator.
14, 17,
20, 56,
81, 52,
83, 93,
100
NC I No internal connection.
9 EVNODD O Even/Odd field for interlaced modes.
40 R0XC+ I TMDS input clock pair. HDMI Port 0.
39 R0XC- I TMDS input clock pair. HDMI Port 0.