![background image](http://html.mh-extra.com/html/sharp/lc-22dv510k/lc-22dv510k_service-manual_373843055.webp)
55
LC-22DV510
LC-24DV510
16. USB2.0 to Fast Ethernet – ASIX AX88X72A (U171)
16.1.
General Description
The AX88772A/AX88172A Low-pin-count USB 2.0 to 10/100M Fast Ethernet controller is a high
performance and highly integrated ASIC which enables low cost, small form factor, and simple plug-and-
play Fast Ethernet network connection capability for desktops, notebook PC’s, Ultra-Mobile PC’s, docking
stations, game consoles, digital-home appliances, and any embedded system using a standard USB port.
The AX88772A/AX88172A features a USB interface to communicate with a USB Host Controller and is
compliant with USB specification V1.1 and V2.0. The AX88772A/AX88172A implements 10/100Mbps
Ethernet LAN function based on IEEE802.3, and IEEE802.3u standards with 24KB of embedded SRAM for
packet buffering. The AX88772A/AX88172A integrates an on-chip 10/100Mbps Ethernet PHY to simplify
system design.
The AX88172A provides an optional External Media Interface (EMI) for external PHY or external MAC for
different application purposes. The EMI can be a media-independent interface (MII) for implementing
100BASE-FX Ethernet or HomePNA functions. The EMI can also be a Reverse-MII or Reverse Reduced-MII
(Reverse-RMII) for glueless MAC-to-MAC connections to any MCU with Ethernet MAC MII or RMII interface.
In addition, the EMI can be configured to Dual-PHY mode allowing AX88172A to act as an Ethernet PHY or
USB 2.0 PHY for external MAC device that needs Ethernet and USB interfaces in their system applications.
The optional serial interface such as I2C, SPI, and UART are provided as a control channel from the USB
Host Controller to communicate with the external MCU chip.
16.2.
Features
Single chip USB 2.0 to 10/100M Fast Ethernet controller – AX88772A
USB Device Interface
Integrates on-chip USB 2.0 transceiver and SIE compliant to USB Spec 1.1 and 2.0
Supports USB Full and High Speed modes with Bus-Power or Self-Power capability
Supports 4 or 6 programmable endpoints on USB interface
High performance packet transfer rate over USB bus using proprietary burst transfer
mechanism
Supports USB to Ethernet bridging or vice versa in hardware
Fast Ethernet Controller
Integrates 10/100Mbps Fast Ethernet MAC/PHY
IEEE 802.3 10BASE-T/100BASE-TX compatible
Supports twisted pair crossover detection and auto-correction (HP Auto-MDIX)
Embedded 16KB SRAM for RX packet buffering and 8KB SRAM for TX packet buffering
Supports both Full-duplex with flow control and
Half-duplex with backpressure operation
Supports 2 VLAN ID filtering, received VLAN Tag (4 bytes) can be stripped off or preserved
MAC/PHY loop-back diagnostic capability
Support Wake-on-LAN Function
15.
15.2
15.1
Summary of Contents for LC-22DV510K
Page 19: ...19 LC 22DV510 LC 24DV510 1 1 General Block Diagram 1 1 General Block Diagram ...
Page 27: ...27 LC 22DV510 LC 24DV510 4 4 Frequency response ...
Page 29: ...29 LC 22DV510 LC 24DV510 5 3 Absolute Ratings 5 3 1 Electrical Characteristics ...
Page 30: ...30 LC 22DV510 LC 24DV510 5 3 2 Operating Specifications ...
Page 31: ...31 LC 22DV510 LC 24DV510 5 4 Pinning ...
Page 33: ...33 LC 22DV510 LC 24DV510 6 3 2 Operating Specifications 6 4 Pinning ...
Page 35: ...35 LC 22DV510 LC 24DV510 Ì µ µ ò Ú ĞÉîê ĞÉîé µ º ò Ú ĞÍïêô ĞÍïéô ĞÍêğ µ µ ò ...
Page 48: ...48 LC 22DV510 LC 24DV510 12 4 Pinning 11 4 ...
Page 49: ...49 LC 22DV510 LC 24DV510 ...
Page 51: ...51 LC 22DV510 LC 24DV510 ...
Page 65: ...65 LC 22DV510 LC 24DV510 23 3 VGA CN132 22 3 ...
Page 68: ...68 LC 22DV510 LC 24DV510 23 3 Options Options Options 1 Options 2 ...
Page 74: ...74 LC 22DV510 LC 24DV510 4 Hardware Architecture Connector Arrangement ...
Page 75: ...75 LC 22DV510 LC 24DV510 Block Diagram ...
Page 86: ...86 LC 22DV510 LC 24DV510 NOTES ...
Page 100: ...100 LC 22DV510 LC 24DV510 29 PRINTED WIRING BOARD Main Unit PWB Top Side ...
Page 120: ...120 LC 22DV510 LC 24DV510 Notes ...
Page 123: ...123 LC 22DV510 LC 24DV510 Notes ...