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LC-22DV510
LC-24DV510
12. DDR2 SDRAM 8M × 4 BANKS × 16 BIT (W9751G6JB) (U154, U155)
12.1.
General Description
The W9751G6JB is a 512M bits DDR2 SDRAM, organized as 8,388,608 words × 4 banks × 16 bits. This device
achieves high speed transfer rates up to 1066Mb/sec/pin (DDR2-1066) for general applications.
W9751G6JB is sorted into the following speed grades: -18, -25 and -3. The -18 is compliant to the DDR2-
1066/CL7 specification. The -25 is compliant to the DDR2-800 (5-5-5) or DDR2-800 (6-6-6) specification.
The -3 is compliant to the DDR2-667 (5-5-5) specification. All of the control and address inputs are
synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of
differential clocks (CLK rising and CLK falling). All I/Os are synchronized with a single ended DQS or
differential DQS- DQS pair in a source synchronous fashion.
12.2.
Features
Power Supply: VDD, VDDQ = 1.8 V± 0.1 V
Double Data Rate architecture: two data transfers per clock cycle
CAS Latency: 3, 4, 5, 6 and 7
Burst Length: 4 and 8
Bi-directional, differential data strobes are transmitted / received with data
Edge-aligned with Read data and center-aligned with Write data
DLL aligns DQ and DQS transitions with clock
Differential clock inputs (CLK and CLK )
Data masks (DM) for write data
Commands entered on each positive CLK edge, data and data mask are referenced to both
edges of DQS
Posted CAS programmable additive latency supported to make command and data bus
efficiency
Read Latency = Additive Latency plus CAS Latency (RL = AL + CL)
Off-Chip-Driver impedance adjustment (OCD) and On-Die-Termination (ODT) for better
signal quality
Auto-precharge operation for read and write bursts
Auto Refresh and Self Refresh modes
Precharged Power Down and Active Power Down
Write Data Mask
Write Latency = Read Latency - 1 (WL = RL - 1)
Interface: SSTL_18
12.3.
Electrical Characteristics
11.
11.3
11.1
11.2
Summary of Contents for LC-22DV510K
Page 19: ...19 LC 22DV510 LC 24DV510 1 1 General Block Diagram 1 1 General Block Diagram ...
Page 27: ...27 LC 22DV510 LC 24DV510 4 4 Frequency response ...
Page 29: ...29 LC 22DV510 LC 24DV510 5 3 Absolute Ratings 5 3 1 Electrical Characteristics ...
Page 30: ...30 LC 22DV510 LC 24DV510 5 3 2 Operating Specifications ...
Page 31: ...31 LC 22DV510 LC 24DV510 5 4 Pinning ...
Page 33: ...33 LC 22DV510 LC 24DV510 6 3 2 Operating Specifications 6 4 Pinning ...
Page 35: ...35 LC 22DV510 LC 24DV510 Ì µ µ ò Ú ĞÉîê ĞÉîé µ º ò Ú ĞÍïêô ĞÍïéô ĞÍêğ µ µ ò ...
Page 48: ...48 LC 22DV510 LC 24DV510 12 4 Pinning 11 4 ...
Page 49: ...49 LC 22DV510 LC 24DV510 ...
Page 51: ...51 LC 22DV510 LC 24DV510 ...
Page 65: ...65 LC 22DV510 LC 24DV510 23 3 VGA CN132 22 3 ...
Page 68: ...68 LC 22DV510 LC 24DV510 23 3 Options Options Options 1 Options 2 ...
Page 74: ...74 LC 22DV510 LC 24DV510 4 Hardware Architecture Connector Arrangement ...
Page 75: ...75 LC 22DV510 LC 24DV510 Block Diagram ...
Page 86: ...86 LC 22DV510 LC 24DV510 NOTES ...
Page 100: ...100 LC 22DV510 LC 24DV510 29 PRINTED WIRING BOARD Main Unit PWB Top Side ...
Page 120: ...120 LC 22DV510 LC 24DV510 Notes ...
Page 123: ...123 LC 22DV510 LC 24DV510 Notes ...