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HT-CN400DVH/HT-CN400DVE/HT-CN500DVH/HT-CN500DVE
IC106 92LRCI6028-001: Microcomputer (ES6028) (2/5)
Port Name
Pin No.
Input/Output
Function
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
63
DMA8
Output
DRAM address bus 8.
64
DMA9
Output
DRAM address bus 9.
65
DMA10
Output
DRAM address bus 10.
66
DMA11
Output
DRAM address bus 11.
67
VSS
Input
Ground.
68
VEE
Input
I/O power supply.
69
DCAS#
Output
DRAM column address strobe.
70
DOE#
Output
DRAM output enable.
DSCL_EN
Output
DRAM clock enable.
71
DWE#
Output
DRAM write enable.
72
DRAS#
Output
DRAM row address strobe.
73
DMBS0
Output
SDRAM bank select 0.
74
DMBS1
Output
SDRAM bank select 1.
75
VEE
Input
I/O power supply.
76
VSS
Input
Ground.
77
DB0
Input/Output
DRAM data bus 0.
78
DB1
Input/Output
DRAM data bus 1.
79
DB2
Input/Output
DRAM data bus 2.
80
DB3
Input/Output
DRAM data bus 3.
81
DB4
Input/Output
DRAM data bus 4.
82
DB5
Input/Output
DRAM data bus 5.
83
VCC
Input
Core power supply.
84
VSS
Input
Ground.
85
DB6
Input/Output
DRAM data bus 6.
86
DB7
Input/Output
DRAM data bus 7.
87
DB8
Input/Output
DRAM data bus 8.
88
DB9
Input/Output
DRAM data bus 9.
89
DB10
Input/Output
DRAM data bus 10.
90
DB11
Input/Output
DRAM data bus 11.
91
VSS
Input
Ground.
92
VEE
Input
I/O power supply.
93
DB12
Input/Output
DRAM data bus 12.
94
DB13
Input/Output
DRAM data bus 13.
95
DB14
Input/Output
DRAM data bus 14.
96
DB15
Input/Output
DRAM data bus 15.
97*
DCS1#
Output
SDRAM chip select 1.
98
VSS
Input
Ground.
99
VEE
Input
I/O power supply.
100
DCS0#
Output
SDRAM chip select 0.
101
DQM
Output
Data input/output mask.
102
DSCK
Output
Output clock to SDRAM.
103
VSS
Input
Ground.
104
VEE
Input
I/O power supply.
105
DCLK
Input
27 MHz clock input to PLL.
106
YUV0
Output
YUV0 pixel output data.
CAMIN2
Input
Camera input 2.
UDAC
Output
Video DAC output.
Y: Luma component for YUV and Y/C processing.
C: Chrominance signal for Y/C processing
U: Chrominance component signal for YUV mode.
V: Chrominance component signal for YUV mode.
107
YUV1
Output
YUV1 pixel output data.
VREF
Input
Internal voltage reference to video DAC. Bypass to ground with 0.1
µ
F capacitor.