TB MRI3-ITE(R) 12.00 E
9
4
Working principle
4.1
Analog circuits
The incoming currents from the main current transform-
ers on the protected object are converted to voltage
signals in proportion to the currents via the input trans-
formers and burden. The noise signals caused by in-
ductive and capacitive coupling are supressed by an
analog RC filter circuit.
The analog voltage signals are fed to the A/D-
converter of the microprocessor and transformed to
digital signals through Sample and Hold circuits. The
analog signals are sampled at 50 Hz (60 Hz) with a
sampling frequency of 800 Hz (960 Hz), namely, a
sampling rate of 1.25 ms (1.04 ms) for every measur-
ing quantity.
4.2
Digital circuits
The essential part of the
MRI3-ITE
relay is a powerful
microcontroller. All of the operations, from the analog
digital conversion to the relay trip decision, are carried
out by the microcontroller digitally. The relay program
is located in an EPROM (Electrically-Programmable-
Read-Only-Memory). With this program the CPU of the
microcontroller calculates the three phase in order to
detect a possible fault situation in the protected object.
For the calculation of the current value an efficient digi-
tal filter based on the Fourier Transformation (DFFT -
Discrete Fast Fourier Transformation) is applied to sup-
press high frequency harmonics and DC components
caused by fault-induced transients or other system dis-
turbances. The calculated actual current values are
compared with the relay settings.
In case, the time for which a current was above the
preset pickup value, exceeds the trip delay or the
thermal capacity is reached, an alarm signal will be
given. Dependent on their adjustment the output relays
will also be activated.
The relay setting values for all parameters are stored in
a parameter memory (EEPROM - Electrically Erasable
Programmable Read-only Memory), so that the actual
relay settings cannot be lost, even if the power supply
is interrupted. The microprocessor is supervised by a
built-in "watchdog" timer. In case of a failure the
watchdog timer resets the microprocessor and gives
an alarm signal, via the output relay "self supervision".
I
I
=>1
I
I
2
%
Alarm
Tripping
Display
tI>
I>
I
tI>>
I>>
I
ϑ
ϑ
ϑ
tIE>
IE>
tIE>>
IE>>
Alarm
Trip
Relay 1
Relay 2
Relay 3
Relay 4
I> Tripping
I> Alarm
I>> Tripping
IE> Alarm
IE> Tripping
IE> Alarm
IE>> Tripping
IE>> Alarm
IL1
IL2
IL3
IE
Assignment
matrix
Blocking
matrix
Figure 4.1: Block diagram
