SM-B79
SM-B79 User Manual - Rev. First Edition: 1.0 - Last Edition: 1.0 - Author: A.R - Reviewed by M.B. - Copyright © 2021 SECO S.p.A.
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3.3.7
CSI Camera Connector
According to SMARC
®
Rel. 2.1.1 specification, SMARC
®
module can offer up to two MIPI CSI
serial camera interfaces. MIPI CSI0 supports up to two differential data lanes, while MIPI CSI1
can support up to four differential data lanes.
Both interfaces are carried to an FFC/FPC connector CN39, type Hirose p/n FH12A-36S-
0.5SH(55), which is able to accept 36 poles 0.5mm pitch FFC cables,
with the pinout shown in the table on the left.
Signal related to MIPI CSI0 (2-lanes MIPI-CSI) interface:
C / CSI0_RX0-: SMARC
®
module MIPI CSI0 Port differential data pair #0
C / CSI0_RX1-: SMARC
®
module MIPI CSI0 Port differential data pair #1
/ CSI0_CK-: SMARC
®
module MIPI CSI0 Port differential clock pair
I2C_CAM0_CK: SMARC
®
module I2C Bus clock line for MIPI CSI0 data support link
I2C_CAM0_DAT: SMARC
®
module I2C Bus data line for MIPI CSI0 data support link
GPIO0 / CAM0_PWR#: Power Enable for MIPI CSI0, Active Low Output. This signal shares the
same pin from card edge connector with GPIO0 (par.3.3.27)
GPIO2 / CAM0_RST#: Reset signal for MIPI CSI0, Active Low Output. This signal shares the
same pin from card edge connector with GPIO2 (par.3.3.27)
Signal related to MIPI CSI1 (4-lanes MIPI-CSI) interface:
C / CSI1_RX0-: SMARC
®
module MIPI CSI1 Port differential data pair #0
C / CSI1_RX1-: SMARC
®
module MIPI CSI1 Port differential data pair #1
C / CSI1_RX2-: SMARC
®
module MIPI CSI1 Port differential data pair #2
C / CSI1_RX3-: SMARC
®
module MIPI CSI1 Port differential data pair #3
/ CSI1_CK-: SMARC
®
module MIPI CSI1 Port differential clock pair
I2C_CAM1_CK: SMARC
®
module I2C Bus clock line for MIPI CSI1 data support link
I2C_CAM1_DAT: SMARC
®
module I2C Bus data line for MIPI CSI1 data support link
GPIO1 / CAM1_PWR#: Power Enable for MIPI CSI1, Active Low Output. This signal shares the same pin from card edge connector with GPIO1 (par.3.3.27)
GPIO3 / CAM1_RST#: Reset signal for MIPI CSI1, Active Low Output. This signal shares the same pin from card edge connector with GPIO3 (par.3.3.27)
CSI Camera Connector CN39
Pin Signal
Pin Signal
1
+3.3V_RUN
19
I2C_CAM1_DAT
2
+3.3V_RUN
20
GPIO1/CAM1_PWR#
3
C
21
CAM_MCLK
4
CSI1_RX0-
22
GPIO0/CAM0_PWR#
5
GND
23
I2C_CAM0_CK
6
C
24
I2C_CAM0_DAT
7
CSI1_RX1-
25
GND
8
GND
26
9
C
27
CSI0_CK-
10
CSI1_RX2-
28
GND
11
GPIO3/CAM1_RST#
29
C
12
C
30
CSI0_RX0-
13
CSI1_RX3-
31
GPIO2/CAM0_RST#
14
GND
32
C
15
33
CSI0_RX1-
16
CSI1_CK-
34
GND
17
GND
35
---
18
I2C_CAM1_CK
36
---