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SM-B79

 

SM-B79 User Manual - Rev. First Edition: 1.0 - Last Edition: 1.0 - Author: A.R - Reviewed by M.B. - Copyright © 2021 SECO S.p.A. 

31 

USB 

I/O 

USB4_EN_OC# 

P76 

S77 

PCIE_C_RST# 

O 

PCI-e 

PCI-e 

I 

PCIE_B_CLKREQ# (JTAG_TMS)  P77 

S78 

PC 

I 

PCI-e 

PCI-e 

I 

PCIE_A_CLKREQ# (JTAG_TCK) 

P78 

S79 

PCIE_C_RX- 

I 

PCI-e 

 

 

GND 

P79 

S80 

GND 

 

PCI-e 

PCI-e 

O 

PCIE_ 

P80 

S81 

PC 

O 

PCI-e 

PCI-e 

O 

PCIE_C_REFCK- 

P81 

S82 

PCIE_C_TX- 

O 

PCI-e 

 

 

GND 

P82 

S83 

GND 

 

 

PCI-e 

O 

PCIE_ 

P83 

S84 

PCIE_ 

O 

PCI-e 

PCI-e 

O 

PCIE_A_REFCK- 

P84 

S85 

PCIE_B_REFCK- 

O 

PCI-e 

 

 

GND 

P85 

S86 

GND 

 

 

PCI-e 

I 

PC 

P86 

S87 

PC 

I 

PCI-e 

PCI-e 

I 

PCIE_A_RX- 

P87 

S88 

PCIE_B_RX- 

I 

PCI-e 

 

 

GND 

P88 

S89 

GND 

 

 

PCI-e 

O 

PC 

P89 

S90 

PC 

O 

PCI-e 

PCI-e 

O 

PCIE_A_TX- 

P90 

S91 

PCIE_B_TX- 

O 

PCI-e 

 

 

GND 

P91 

S92 

GND 

 

 

HDMI/DP++ INTERFACE #1 

O 

 / DP 

P92 

S93 

DP 

O 

DP++ INTERFACE #0 

HDMI/DP++ INTERFACE #1 

O 

HDMI_D2- / DP1_LANE0- 

P93 

S94 

DP0_LANE0- 

O 

DP++ INTERFACE #0 

 

 

GND 

P94 

S95 

DP0_AUX_SEL 

I 

DP++ INTERFACE #0 

HDMI/DP++ INTERFACE #1 

O 

 / DP 

P95 

S96 

DP 

O 

DP++ INTERFACE #0 

HDMI/DP++ INTERFACE #1 

O 

HDMI_D1- / DP1_LANE1- 

P96 

S97 

DP0_LANE1- 

O 

DP++ INTERFACE #0 

 

 

GND 

P97 

S98 

DP0_HPD 

I 

DP++ INTERFACE #0 

HDMI/DP++ INTERFACE #1 

O 

 / DP 

P98 

S99 

DP 

O 

DP++ INTERFACE #0 

HDMI/DP++ INTERFACE #1 

O 

HDMI_D0- / DP1_LANE2- 

P99 

S100 

DP0_LANE2- 

O 

DP++ INTERFACE #0 

 

 

GND 

P100 

S101 

GND 

 

 

HDMI/DP++ INTERFACE #1 

O 

/ DP 

P101 

S102 

DP 

O 

DP++ INTERFACE #0 

HDMI/DP++ INTERFACE #1 

O 

HDMI_CK- / DP1_LANE3- 

P102 

S103 

DP0_LANE3- 

O 

DP++ INTERFACE #0 

 

 

GND 

P103 

S104 

USB3_OTG_ID 

I 

USB 

HDMI/DP++ INTERFACE #1 

I 

HDMI_HPD / DP1_HPD 

P104 

S105 

 

I/O 

DP++ INTERFACE #0 

HDMI/DP++ INTERFACE #1 

I/O 

HDMI_CTRL_CK/ 

P105 

S106 

DP0_AUX- 

I/O 

DP++ INTERFACE #0 

Summary of Contents for Smarc SM-B79

Page 1: ...SM B79 Carrier Board for SMARC Rel 2 0 2 1 compliant modules...

Page 2: ...e accuracy of this manual However SECO S p A accepts no responsibility for any inaccuracies errors or omissions herein SECO S p A reserves the right to change precise specifications without prior noti...

Page 3: ...specifications 13 OVERVIEW 15 2 1 Introduction 16 2 2 Technical Specifications 17 2 3 Electrical Specifications 18 2 3 1 Smart Battery Connector 18 2 3 2 RTC Battery 19 2 3 3 lector 19 2 3 4 Power Ra...

Page 4: ...Key B Slot 53 3 3 14 microSIM Slot 55 3 3 15 PCI e ports 55 3 3 16 USB Connectors 58 3 3 17 Audio Connectors 62 3 3 18 COM Port Header 64 3 3 19 CAN ports 66 3 3 20 USB Debug Connector 66 3 3 21 FAN...

Page 5: ...0 Last Edition 1 0 Author A R Reviewed by S R Copyright 2021 SECO S p A 5 Warranty Information and assistance RMA number request Safety Electrostatic Discharges RoHS compliance Safety Policy Terminol...

Page 6: ...ne The RMA authorisation number must be put both on the packaging and on the documents shipped with the items which must include all the accessories in their original packaging with no signs of damage...

Page 7: ...ter it is possible to send the faulty product to the SECO Repair Centre In this case follow this procedure o Returned items must be accompanied by a RMA Number Items sent without the RMA number will b...

Page 8: ...g RoHS compliant components and is manufactured on a lead free production line It is therefore fully RoHS compliant Always switch the power off and unplug the power supply unit before handling the boa...

Page 9: ...IEC 60417 5041 element 1a according to clause 9 5 2 of the IEC 62368 1 on the external part installed inside an enclosure compliant with all applicable IEC 62368 1 requirements The manufacturer which...

Page 10: ...video display interface developed especially for internal connections between boards and digital displays GBE Gigabit Ethernet Gbps Gigabits per second GND Ground GPI O General purpose Input Output H...

Page 11: ...echnology Attachment a differential full duplex serial interface for Hard Disks SD Secure Digital a memory card type SDIO Secure Digital Input Output an evolution of the SD standard that allows the us...

Page 12: ...USB Universal Serial Bus VP8 Open video compression format a traditional block based transform coding format VP9 Successor to VP8 customized for video greater than 1080p WMV9 Series 9 of Windows Media...

Page 13: ...ttp www intel com content dam www public us en documents product specifications high definition audio specification pdf HDMI http www hdmi org index aspx I2C http www nxp com documents other UM10204_v...

Page 14: ...Edition 1 0 Author A R Reviewed by S R Copyright 2021 SECO S p A 14 UEFI http www uefi org USB 2 0 and USB OTG http www usb org developers docs usb_20_070113 zip USB 3 0 https usb org 10 1 108 210 cau...

Page 15: ...9 User Manual Rev First Edition 1 0 Last Edition 1 0 Author A R Reviewed by S R Copyright 2021 SECO S p A 15 Introduction Technical Specifications Electrical Specifications Mechanical Specifications B...

Page 16: ...ent more functionalities other than included in the standard SMARC bus interface SMARC Modules are used on a Carrier board that utilizes a 314 pin 0 5mm pitch right angle memory socket style connector...

Page 17: ...hared with M 2 Slots Audio TRSS Audio Jack Onboard I2S Audio Codec TI TLV320AIC3204 HD Audio Codec Cirrus Logic CS4207 I2S Audio header Serial Ports 2 x CAN ports 2 x RS 232 RS 422 RS 485 configurable...

Page 18: ...is a 8 pin male connector is provided type HR p n A2001WR S 08PD01 or equivalent with pinout shown in the table on the left Mating connector JST PHR 8 crimp housing with JST SPH 002T P0 5L crimp termi...

Page 19: ...teries from the board in order to collect and dispose them according to the requirement of the same European Directive above mentioned Even when replacing the batteries the disposal has to be made acc...

Page 20: ...tor CN8 par 2 3 3 VDD_RTC Low current RTC circuit backup power 3V coin cell voltage coming from the RTC Coin Cell Battery holder CN2 for supplying the RTC clock on SMARC module _RUN Switched voltages...

Page 21: ...cifications According to microATX form factor board dimensions are 243 84 x 243 84 mm The printed circuit of the board is made of twelve layers some of them are ground planes for disturbance rejection...

Page 22: ...poles Pin Header 2 3 4 Cell Smart Battery connector CAN 0 1 SATA Switch POST Code 4 x 7 Segment Displays LED Driver GP_I2C MIPI CSI SER 0 2 GbE 0 1 eDP 0 1 LVDS DSI LVDS MIPI DSI eDP 0 1 DP Switch Swi...

Page 23: ...Connectors placement Connectors overview Connectors description...

Page 24: ...SPI Flash Socket CSI Camera Smart Battery CAN 1 COM 0 2 header M 2 WWAN Key B Slot I2S Audio header M 2 KeyB SSD slot eDP 1 Connector LVDS SPI Internal header Backlight LCD Pwr 0 Coin Battery Holder...

Page 25: ...r 0 selector Power button COM 1 mode sel CAN 0 Termin sel M 2 Key B Disable 2 COM 1 termin sel Reset button BKL Pwr 0 selector LCD Pwr 1 selector SER1 redirector LVDS eDP selector Boot selectors micro...

Page 26: ...PCB terminal Block CN17 LCD Panel 1 Voltage connector CN69 eSPI Flash Socket CN25 COM 0 2 internal Header CN70 JTAG Connector CN27 Dual Gigabit Ethernet Connector GbE 0 1 CN71 I2C EEPROM Socket CN28...

Page 27: ...ode selector JP16 M 2 Key E Wireless Disable 1 CN24 COM 2 mode selector JP17 M 2 Key B Wireless Disable 1 CN53 Power ON Force selector JP18 M 2 Key B Wireless Disable 2 CN55 FAN Power Selector JP20 Po...

Page 28: ...ey are respectively outputs and inputs SMARC MXM Connector CN49 TOP SIDE BOTTOM SIDE SIGNAL GROUP Type Pin name Pin nr Pin nr Pin name Type SIGNAL GROUP S1 I2C_CAM1_CK I O CSI1 CAMERA INTERFACE MANAGE...

Page 29: ..._D_TX O SERDES PCI e GBE I O GBE0_MDI0 P29 S30 SERDES_0_TX PCIE_D_TX O SERDES PCI e GBE I O GBE0_MDI0 P30 S31 GBE1_LINK_ACT O GBE SPI 0 INTERFACE O SPI0_CS1 P31 S32 SERDES_0_RX PCIE_D_RX I SERDES PCI...

Page 30: ...CK ESPI_CK P56 S57 ESPI_IO_3 I O eSPI INTERFACE SPI 1 eSPI INTERFACE I O SPI1_DIN ESPI_IO_1 P57 S58 ESPI_RESET O eSPI INTERFACE SPI 1 eSPI INTERFACE I O SPI1_DO ESPI_IO_0 P58 S59 USB5 I O USB GND P59...

Page 31: ...PCI e GND P91 S92 GND HDMI DP INTERFACE 1 O HDMI_D2 DP1_LANE0 P92 S93 DP0_LANE0 O DP INTERFACE 0 HDMI DP INTERFACE 1 O HDMI_D2 DP1_LANE0 P93 S94 DP0_LANE0 O DP INTERFACE 0 GND P94 S95 DP0_AUX_SEL I D...

Page 32: ...PRIMARY_DISPLAY GPIO I O GPIO5 PWM_OUT P113 S114 LVDS1_1 eDP1_TX1 DSI1_D1 O PRIMARY_DISPLAY GPIO I O GPIO6 TACHIN P114 S115 LVDS1_1 eDP1_TX1 DSI1_D1 O PRIMARY_DISPLAY GPIO I O GPIO7 P115 S116 LCD1_VD...

Page 33: ...135 LVDS0_CK eDP0_AUX DSI0_CLK O PRIMARY_DISPLAY ASYNC_SERIAL I SER1_RX P135 S136 GND ASYNC_SERIAL O SER2_TX P136 S137 LVDS0_3 eDP0_TX3 DSI0_D3 O PRIMARY_DISPLAY ASYNC_SERIAL I SER2_RX P137 S138 LVDS0...

Page 34: ...M B Copyright 2021 SECO S p A 34 VDD_IN P151 S152 CHARGER_PRSNT I MANAGEMENT VDD_IN P152 S153 CARRIER_STBY O MANAGEMENT VDD_IN P153 S154 CARRIER_PWR_ON O MANAGEMENT VDD_IN P154 S155 FORCE_RECOV I BOO...

Page 35: ...the table on the left Mating connector HR A1014H 2X25P with HR A1014 T female crimp terminals Alternative mating connector MOLEX 501189 5010 with crimp terminals series 501334 On the same connector ar...

Page 36: ...DS Panel Backlight Brightness Control PWM signal derived by LCD0_BKLT_PWM from SMARC Module through voltage level translator 3 3V_RUN electrical level Output In order to match the SM B79 Carrier Board...

Page 37: ...CN61 par 3 3 3 The Backlight Voltage rail VDD_BKLT1 value can be set to 5V_RUN or 12V_RUN by using dedicated jumper CN21 which is another standard pin header P2 54mm 1x3 pin This selectable power rai...

Page 38: ...dule MIPI DSI Channel 0 Differential pairs DSI0_CLK _CONN LVDS0_CLK _CONN SMARC Module MIPI DSI Channel 0 Differential clock DSI1_D 0 3 _CONN LVDS1_D 0 3 _CONN SMARC Module MIPI DSI Channel 1 Differen...

Page 39: ...nvolved in eDP channel 0 management eDP0_TX 0 3 eDP0_TX 0 3 SMARC module embedded DP channel 0 differential data pairs eDP0_AUX eDP0_AUX SMARC module embedded DP channel 0 auxiliary channel differenti...

Page 40: ..._VDD_EN_3V3 eDP channel 1 Panel power for LCD Enable Signal derived by LCD1_VDD_EN from SMARC Module through voltage level translator 3 3V_RUN electrical level Output LCD1_BKLTEN_3V3 eDP channel 1 Pan...

Page 41: ...tandard certified HDMI connector CN79 type A model MOLEX p n 2086581001 with the pinout shown in the table on the left Signals involved in HDMI management are the following HDMI_CLK _CON HDMI_CLK _CON...

Page 42: ...ock differential pair DDI1_CTRLCLK_AUX DDI1_CTRLDATA_AUX SMARC module DDI Interface 1 Auxiliary channel for Display Port differential pair or DDC Clock and Data Line for TMDS DDI1_HPD DDI Interface 1...

Page 43: ...2 1 1 specifications so that the carrier board is ready for the use of any SMARC module that follows those specifications Please refer to the SMARC the availability of the HDMI DP signals The multimod...

Page 44: ...signal is tied to GND through a resistor DDI0_DDC_AUX_SEL DDI Interface 0 Cable Adapter Detect signal When this signal is detected high then on the connector there is the TMDS interface it means that...

Page 45: ...w Output This signal shares the same pin from card edge connector with GPIO2 par 3 3 27 Signal related to MIPI CSI1 4 lanes MIPI CSI interface CSI1_RX0 CSI1_RX0 SMARC module MIPI CSI1 Port differentia...

Page 46: ...ctor used for the M 2 SSD slot is CN35 which is a standard 75 pin M 2 Key B connector type LOTES p n APCI0087 P001A H 8 5mm with the pinout shown in the table on the left On the SM B79 carrier board t...

Page 47: ...M 2 SSD is not plugged the SATA interface is redirected by default to the 7p M connector CN34 Vice versa when M 2 SSD is plugged the SATA interface is redirected by default to SATA M 2 SSD slot CN35 W...

Page 48: ...and Response bidirectional line used for card initialization and for command transfers SDIO_D 0 3 SD Card data bus SDIO_D0 signal is used for all communication mode SDIO_D 1 3 signals are required for...

Page 49: ...iver connected to SERDES0 is used to implement Gigabit Ethernet Ports 3 For this reason on board there is another double port RJ 45 socket CN28 type TRXCOM p n TRJG27420AINL or equivalent with 2kV dec...

Page 50: ...tly manged by the SMARC module while Gigabit Ethernet interfaces Ports 2 3 are managed by PHYs Transceivers on SM B79 carrier board interfaced to SERDES interfaces from SMARC module Please notice that...

Page 51: ...E connectivity modules in 2230 size Please be aware that PCI e interface will be available on this slot only if Used SMARC modules offer at least 2x PCI e x1 interfaces since it is connected to PCI e...

Page 52: ...ane B This signal shall be driven low by the module inserted in the M 2 WLAN slot in order to ensure that the PCI Express Reference Clock for lane B is made available for this slot i e PCIe_B_CLK _M2...

Page 53: ...ze Please be aware that PCI e interface will be available on this slot only if Used SMARC modules offer at least 1x PCI e x1 interface since it is connected to PCI e port A AND configure properly 2 4...

Page 54: ...inserted in the M 2 WWAN slot in order to ensure that the PCI Express Reference Clock for lane B is made available for this slot i e PCIe_B_CLK _M2 PCIe_B_CLK _M2 W_DISABLE1_B this signal can be used...

Page 55: ...switch SW17 type ADIMPEX p n KVT04602 R in order to allow the routing of PCI e root ports For PCI lanes A and B these can be routed to M 2 Key E Slot CN36 PCIe B and M 2 Key B Slot CN38 PCIe A or to P...

Page 56: ...up resistor derived by I2C_PM_CK with voltage level translator PCIE_SMB_CLK B5 A5 JTAG2 Not connected SM Bus Data line 3 3V_RUN electrical level with 2 2 up resistor derived by I2C_PM_DAT with voltag...

Page 57: ...22 PCIE_B_RX _X4 SMARC module PCI e lane Receiver lane B SMARC module PCI e lane Transmitter lane C PCIE_C_TX _X4 B23 A23 GND Power Ground SMARC module PCI e lane Transmitter lane C PCIE_C_TX _X4 B24...

Page 58: ...B Port 0 coming out from SMARC module could support OTG functionalities it depends on the functionalities offered by the SMARC module used however For this reason this port is carried out through a st...

Page 59: ...USB 2 0 plugs For USB 3 0 connections it is mandatory the use of SuperSpeed certified cables whose SuperSpeed differential pairs are individually shielded inside the global cable s external shielding...

Page 60: ...hat the plug can be flipped relative to the receptacle The redundancy for the signal on Row A and B is included only to provide a flippable connector The Power Delivery controller on SM B79 carrier bo...

Page 61: ...by SMARC module USB1_EN_OC USB over current sense signal for USB Port 1 Active Low Input Signal driven by current limited power switch IC for 5VUSB1 and manged by SMARC module USB2_EN_OC USB over cur...

Page 62: ...the I2S0 interface from card edge connector for the TRSS Audio Jack CN41 In addition if the SMARC module has a secondary I2S audio support the I2S2 interface from card edge connector is made available...

Page 63: ...ical level I2S2_RST _3 3V I2S Digital Audio Reset Output active low signal This signal is routed through 3 way jumper CN82 so the signal is derived by HDA_RST 1 2 position or by RESET_OUT 2 3 position...

Page 64: ...nals must be used as a handshaking signal i e it is used to control the data flow direction When RTS signal is driven low then the RS 485 port is in receiving mode when RTS signal is driven high then...

Page 65: ...OM2_Data COM2_Data COM Port 2 Half Duplex RS 485 Differential Pair Other two 3 way jumpers CN63 and CN64 can be used to place 120Ohm terminations between the differential pairs of COM0 and COM2 when w...

Page 66: ...ailable on feature header External interface is available on an USB micro B connector CN73 type Molex p n 105017000 with standard pinout for USB 2 0 device connections Since SER 1 port can also be con...

Page 67: ...while the second one SPI1 does share the same pins with QSPI or eSPI interface The SPI0 interface available on SMARC card edge connector is available both on a SPI Flash Socket CN43 type LOTES p n AC...

Page 68: ...54 mm header CN44 type MOLEX p n 70246 1404 or equivalent with the following pinout Signal description ESPI_CK SMARC module eSPI Master Clock Output ESPI_IO_ 0 3 SMARC module eSPI Master Data Input Ou...

Page 69: ...rackets Mating connector MOLEX p n 22 25 2202 with 70058 series female crimp terminals For signal description do refer directly to SMARC module user manual intended to be used with SM B79 carrier boar...

Page 70: ..._3V3 Signal indicating the system is in Suspend to RAM S3 state Active Low Output Signal with a 10 module CARRIER_STBY SUS_S5 _3 3V_A Signal indicating the system is in Soft Off S5 state Active Low Ou...

Page 71: ...ivation of diode LED D99 signalling working condition when external storage device is attached par 3 3 8 SMB_CLK_BAT Smart Battery System Management bus bidirectional clock line 3 3V_DSW electrical le...

Page 72: ...scription GPIO0 CAM0_PWR SMARC module GPIO0 This signal shares the same pin from card edge connector with CAM0_PWR par 3 3 7 GPIO1 CAM1_PWR SMARC module GPIO1 This signal shares the same pin from card...

Page 73: ...according to SMARC Boot select table For the BOOT source options referred to vendor specific please refer to specific SMARC module user manual for details Switch 2 of dual DIP Switch SW13 manages the...

Page 74: ...changes in LID state the OS could trigger the transition of the module from Working to Sleep status or vice versa All the above signals can be also remoted by using feature header CN45 par 3 3 26 In...

Page 75: ...D103 VDD_IN ON if present D104 5V_ALW ON if present D105 3V3_ALW ON if present D108 12V_RUN ON if present D109 5V_RUN ON if present D110 3V3_RUN ON if present D107 3V3_ALW driven by 1V8_RUN ON if pre...

Page 76: ...SM B79 SM B79 User Manual Rev First Edition 1 0 Last Edition 1 0 Author A R Reviewed by M B Copyright 2021 SECO S p A 76 Thermal Design Accessories...

Page 77: ...intended to be a cooling system by itself but only as means for transferring heat to another surface cooler like heatsinks fans heat pipes and so on Conversely heatsinks in some situation can represe...

Page 78: ...ady available for Qseven Carrier boards The full development kit is coded as SMARC DEV KIT and does contain Carrier board for SMARC rel 2 0 2 1 compliant modules SM B79 Power adapter cable Free wires...

Page 79: ...M B79 User Manual Rev First Edition 1 0 Last Edition 1 0 Author A R Reviewed by M B Copyright 2021 SECO S p A 79 SECO S p A Via A Grandi 20 52100 Arezzo ITALY Ph 39 0575 26979 Fax 39 0575 350210 www s...

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