SDML-WLU0 Series - User Guide, Rev. 1.0
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Pin
Key E
CNVi
Note
Signal
Description
Signal
Description
65
-
WT_D0N
CNVio bus Tx Lane 0 (-)
66
-
-
67
-
WT_D0P
CNVio bus Tx Lane 0 (+)
68
-
-
69
GND
Ground
GND
Ground
70
-
-
71
-
WT_CLKN
CNVio bus Tx clock (-)
72
+3.3V
3.3 V power supply
+3.3V
3.3 V power supply
73
-
WT_CLKP
CNVio bus Tx clock (+)
74
+3.3V
3.3 V power supply
+3.3V
3.3 V power supply
75
GND
Ground
GND
Ground
