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ATA Register Set and Protocol

SanDisk CompactFlash Card OEM Product Manual

4.5.6

Cylinder Low (LBA 15-8) Register (Address–1F4[174]; Offset 4)

This register contains the low order 8 bits of the starting cylinder address or bits 15-8 of the
Logical Block Address.

4.5.7

Cylinder High (LBA 23-16) Register (Address–1F5[175]; Offset 5)

This register contains the high order bits of the starting cylinder address or bits 23-16 of the
Logical Block Address.

4.5.8

Drive/Head (LBA 27-24) Register (Address–1F6[176]; Offset 6)

The Drive/Head Register is used to select the drive and head. It is also used to select LBA
addressing instead of cylinder/head/sector addressing. The bits are defined as follows:

D7

D6

D5

D4

D3

D2

D1

D0

1

LBA

1

DRV

HS3

HS2

HS1

HS0

Bit

Name

Description

D7

1

Bit set to 1.

D6

LBA

LBA is a flag to select either Cylinder/Head/Sector (CHS) or Logical Block
Address Mode (LBA). When LBA=0, Cylinder/Head/Sector mode is
selected. When LBA=1, Logical Block Address is selected. In Logical Block
Mode, the Logical Block Address is interpreted as follows:

LBA07-LBA00: Sector Number Register D7-D0.

LBA15-LBA08: Cylinder Low Register D7-D0.

LBA23-LBA16: Cylinder High Register D7-D0.

LBA27-LBA24: Drive/Head Register bits HS3-HS0.

D5

1

Bit set to 1.

D4

DRV

This bit will have the following meaning. DRV is the drive number. When
DRV=0, drive (card) 0 is selected When DRV=1, drive (card) 1 is selected.
The CompactFlash Card is set to be Card 0 or 1 using the copy field of the
PCMCIA Socket & Copy configuration register.

D3

HS3

When operating in the Cylinder , Head, Sector mode, this is bit 3 of the
head number. It is Bit 27 in the Logical Block Address mode.

D2

HS2

When operating in the Cylinder , Head, Sector mode, this is bit 2 of the
head number. It is Bit 26 in the Logical Block Address mode.

D1

HS1

When operating in the Cylinder , Head, Sector mode, this is bit 1 of the
head number. It is Bit 25 in the Logical Block Address mode.

D0

HS0

When operating in the Cylinder , Head, Sector mode, this is bit 0 of the
head number. It is Bit 24 in the Logical Block Address mode.

02/07, Rev. 12.0

4-6

© 2007 SanDisk Corporation

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Summary of Contents for CompactFlash Extreme III

Page 1: ...lash Memory Card OEM Product Manual Version 12 0 Document No 20 10 00038 02 2007 SanDisk Corporation Corporate Headquarters 601 McCarthy Boulevard Milpitas CA 95035 408 801 1000 Phone 408 801 8657 Fax...

Page 2: ......

Page 3: ...stored in a retrievable manner or translated into any language or computer language in any form or by any means electronic mechanical magnetic optical chemical manual or otherwise without the prior w...

Page 4: ...SanDisk CompactFlash Card OEM Product Manual This page intentionally left blank 02 07 Rev 12 0 ii 2007 SanDisk Corporation...

Page 5: ...er Requirements 2 1 System Performance 2 3 System Reliability 2 4 Physical Specifications 2 4 CHAPTER 3 Interface Description 3 1 Physical Description 3 1 Electrical Description 3 3 Electrical Specifi...

Page 6: ...DE Mode Addressing 4 4 ATA Registers 4 4 CHAPTER 5 ATA Command Description 5 1 ATA Command Set 5 1 Error Posting 5 29 CHAPTER 6 CIS Description 6 1 APPENDIX A Ordering Information A 1 APPENDIX B Limit...

Page 7: ...a high level interface to the host computer This interface allows a host computer to issue commands to the memory card to read or write blocks of memory The host addresses the card in 512 byte sectors...

Page 8: ...equired MTBF 1 000 000 hours Minimum 10 000 insertions 1 3 Scope This document describes the key features and specifications of CompactFlash Memory cards as well as the information required to interfa...

Page 9: ...ed from IHS by calling 1 800 854 7179 or accessing their Web site http global ihs com 1 7 Functional Description CompactFlash Memory cards contain a high level intelligent subsystem as shown in the bl...

Page 10: ...will rewrite data from a defective sector to a good sector This is completely transparent to the host and does not consume any user data space The CompactFlash Memory Card soft error rate specificati...

Page 11: ...t It may do this if desired but it is not needed By not issuing the reset performance is improved through the reduction of overhead but this must be done only for the SanDisk products as other ATA pro...

Page 12: ...Introduction SanDisk CompactFlash Card OEM Product Manual This page intentionally left blank 02 07 Rev 12 0 1 6 2007 SanDisk Corporation...

Page 13: ...umidity Operating Non operating 8 to 95 non condensing 8 to 95 non condensing 8 to 95 non condensing 8 to 95 non condensing Acoustic Noise At 1 meter 0 dB 0 dB Vibration Operating Non operating 15 G p...

Page 14: ...ipple p p 3 3V 5 5V 10 Memory Subsystema CompactFlash Memory Card Sleep Up to 512 MB 300 500 1 0 GB 600 800 Over 1 0 GB 1 mA 1 2 mA Read 50 mA 55 mA Write 65 mA 70 mA Read Write Peak 100 mA 100 mA Mem...

Page 15: ...burst Controller Overhead Command to DRQ 50 ms maximum CompactFlash Extreme III Memory Card Start up Times Sleep to Write Sleep to Read Reset to Ready 2 5 ms maximum 20 ms maximum 50 ms typical 400 m...

Page 16: ...1 erroneous correction in 1020 bits read 2 5 Physical Specifications Refer to Table 2 5 and see Figure 2 1 for CompactFlash Memory Card physical specifications and dimensions Table 2 5 CompactFlash Ph...

Page 17: ...SanDisk CompactFlash Card OEM Product Manual Product Specifications Figure 2 1 CompactFlash Memory Card Dimensions 2007 SanDisk Corporation 2 5 Rev 12 0 02 07...

Page 18: ...Product Specifications SanDisk CompactFlash Card OEM Product Manual This page intentionally left blank 02 07 Rev 12 0 2 6 2007 SanDisk Corporation...

Page 19: ...nd 26 CD1 O Ground 2 D03 I O I1Z OZ3 27 D11 I O I1Z OZ3 3 D04 I O I1Z OZ3 28 D12 I O I1Z OZ3 4 D05 I O I1Z OZ3 29 D13 I O I1Z OZ3 5 D06 I O I1Z OZ3 30 D14 I O I1Z OZ3 6 D07 I O I1Z OZ3 31 D15 I O I1Z...

Page 20: ...39 CSEL I I2Z 15 A05 I I1Z 40 VS2 O OPEN 16 A04 I I1Z 41 RESET I I2Z 17 A03 I I1Z 42 WAIT O OT1 18 A02 I I1Z 43 INPACK O OT1 19 A01 I I1Z 44 REG I I3U 20 A00 I I1Z 45 SPKR I O I1U OT1 21 D00 I O I1Z...

Page 21: ...optimized for operation with hosts which support the PCMCIA I O interface standard conforming to the PC Card ATA specification However the card may also be configured to operate in systems that suppo...

Page 22: ...he master slave handshake protocol BVD2 PC Card Memory Mode SPKR PC Card I O Mode DASP True IDE Mode I O 45 This output line is always driven to a high state in Memory Mode since a battery is not requ...

Page 23: ...y Mode INPACK PC Card I O Mode DMARQ True IDE Mode O 43 This signal is not used in this mode The Input Acknowledge signal is asserted by the card when it is selected and responding to an I O read cycl...

Page 24: ...w data transfer operation and held low when the card is busy The host memory card socket must provide a pull up resistor At power up and at reset the RDY BSY signal is held low busy until the card has...

Page 25: ...I O Mode True IDE Mode 13 38 5V 3 3V power VS1 VS2 PC Card Memory Mode PC Card I O Mode True IDE Mode O 33 40 Voltage Sense Signals VS1 is grounded so that the CompactFlash Card CIS can be read at 3...

Page 26: ...rwise stated VCC 5V 10 VCC 3 3V 5 Ta 0 C to 60 C Absolute Maximum conditions VCC 0 3V min to 6 5V max V 0 5V min to VCC 0 5V max Voltage on any pin except VCC with respect to GND 3 3 1 Input Leakage C...

Page 27: ...aracteristics described in Table 3 8 For example OT3 refers to Totempole output with a Type 3 output drive characteristic Table 3 7 Output Drive Type Type Output Type Valid Conditions OTx Totempole lo...

Page 28: ...ng Timeb 90 of VCC 5 10 3 0 300 ms tpf VCC Falling Timeb Reset Width TW RESET 10 s Th Hi z Reset 1 ms TS Hi z Reset 0 ms Min Max Unit a ViMAX means Absolute Maximum Voltage for Input in the period of...

Page 29: ...Memory Card Skews and delays from the system driver receiver to the card must be accounted for by the system Table 3 10 Common Memory Read Timing Specification Speed Version Item Symbol Read Cycle Tim...

Page 30: ...signal Table 3 11 Common and Attribute Memory Write Timing Specification 100 ns Speed Version Symbol IEEE Symbol Write Cycle Time tc W 100 tAVAV Write Pulse Width tw WE 60 tWLWH tsu A 10 tAVWL Addres...

Page 31: ...Address Access Timea ta CE 300 Card Enable Access Time tELQV Output Enable Access Time ta OE 150 tGLQV Output Disable Time from OE tdis OE 100 tGHQZ Output Enable Time from OE ten OE 5 tGLQNZ tv A 0...

Page 32: ...be high or low NOTE 2 When the data I O pins are in the output state no signals shall be applied to the data pins D 15 0 by the host system NOTE 3 May be high or low for write timing but restrictions...

Page 33: ...h Memory cards do ont assert a WAIT signal Table 3 13 I O Read Input Timing Specification Item Symbol IEEE Symbol Min ns Max ns Data Delay after IORD td IORD tlGLQV 100 Data Hold following IORD th IOR...

Page 34: ...imum load on INPACK and IOIS16 is 1 LSTTL with 50 pF total load 3 3 9 I O Write Output Timing Specification Figure 3 6 I O Write Timing Diagram NOTE 1 All timings are measured at the CompactFlash Memo...

Page 35: ...de De skewing The host will provide cable de skewing for all signals originating from the device The device will provide cable de skewing for all signals originating at the host All timing values and...

Page 36: ...minimum total cycle time t2 is the minimum command active time and t2i is the minimum command recovery time or command inactive time The actual cycle time equals the sum of the actual command active...

Page 37: ...nsfers For PIO Modes 3 and above the minimum value of t0 is specified by Word 68 in the IDENTIFY DEVICE parameter list Table 3 16 defines the minimum value that will be placed in Word 68 Figure 3 8 PI...

Page 38: ...ime and t2i is the minimum command recovery time or command inactive time The actual cycle time equals the sum of the actual command active time and the actual command inactive time The three timing r...

Page 39: ...bit D15 D0 X 0 0 1 0 X 1 XX X X X 0 Configuration Registers Write 1 0 1 1 0 X X XX X X X X Common Memory Write 8 bit D7 D0 0 1 1 1 0 X X XX X X X X Common Memory Write 8 bit D15 D8 0 0 1 1 0 X X XX X...

Page 40: ...active and WE inactive during the cycle As in the Main Memory Read functions the signals CE1 and CE2 control the even byte and odd byte address but only the even byte data is valid during the Attribu...

Page 41: ...s set to 0 by power up and hardware reset Using the PCMCIA Soft Reset is considered a hard Reset by the ATA Commands Contrast with Soft Reset in the Device Control Register This bit is set to 1 when L...

Page 42: ...receives a command D1 Int This bit represents the internal state of the interrupt request This value is available whether or not I O interface has been configured This signal remains true until the c...

Page 43: ...escription This bit is reserved for future standardization This bit must be set to 0 by the software when the register is written This bit indicates the drive number of the card if twin card configura...

Page 44: ...are allowed In this mode no Memory or Attribute registers are accessible to the host CompactFlash cards permit 8 bit data accesses if the user issues a Set Feature Command to put the device in 8 bit...

Page 45: ...0 F 400 7FF 0 Memory Mapped 1 I O XX0 XXF 0 I O Mapped 16 Contiguous Registers 2 I O 1F0 1F7 3F6 3F7 0 Primary I O Mapped Drive 0 2 I O 1F0 1F7 3F6 3F7 1 Primary I O Mapped Drive 1 3 I O 170 177 376 3...

Page 46: ...Odd RD Datab Dup Odd WR Datab 0 1 1 0 1 D Dup Errorb Dup Featuresb 0 1 1 1 0 E Alt Status Device Ctl 0 1 1 1 1 F Drive Address Reserved a Register 0 is accessed with CE1 low and CE2 low and A0 Do not...

Page 47: ...the odd byte of the equivalent word access A byte access to register 0 with CE1 high and CE2 low accesses the error read or feature write register b Registers at offset 8 9 and D are non overlapping...

Page 48: ...ddress 1F0 170 Offset 0 8 9 The Data Register is a 16 bit register and it is used to transfer data blocks between the CompactFlash Memory Card data buffer and the host This register overlaps the Error...

Page 49: ...etc or when an invalid command has been issued D1 0 Bit set to 0 D0 AMNF Set in case of a general error 4 5 3 Feature Register Address 1F1 171 Offset 1 0Dh Write Only This register provides informati...

Page 50: ...l Block Address is selected In Logical Block Mode the Logical Block Address is interpreted as follows LBA07 LBA00 Sector Number Register D7 D0 LBA15 LBA08 Cylinder Low Register D7 D0 LBA23 LBA16 Cylin...

Page 51: ...card operations This bit is cleared at power up and remains cleared until card is ready to accept a command D5 DWF If set indicates a write fault has occurred D4 DSC Set when the card is ready D3 DRQ...

Page 52: ...D1 IEn Interrupt Enable bit enables interrupts when the bit is 0 When the bit is 1 interrupts from the card are disabled This bit also controls the Int bit in the Configuration and Status Register Th...

Page 53: ...d conversely to tri state D6 D0 of I O address 3F7 377 when a floppy controller is installed 4 Do not use the card s Drive Address Register This may be accomplished by either a If possible program the...

Page 54: ...ATA Register Set and Protocol SanDisk CompactFlash Card OEM Product Manual This page intentionally left blank 02 07 Rev 12 0 4 10 2007 SanDisk Corporation...

Page 55: ...ting DRQ Upon receipt of a Class 3 command the card sets the BUSY bit within 400 nsec sets up the sector buffer for a write operation sets DRQ within 20 msec assuming no re assignments and clears the...

Page 56: ...ssued the sectors will be erased but there will be no net gain in write performance when using the Write Without Erase command b These commands are not standard PC Card ATA commands but provide additi...

Page 57: ...performs the internal diagnostic tests implemented by the CompactFlash cards Table 5 3 Execute Drive Diagnostic Bit 7 6 5 4 3 2 1 0 Command 7 90H C D H 6 X Drive X Cyl High 5 X Cyl Low 4 X Sec Num 3...

Page 58: ...es the desired head and cylinder of the selected drive with an FFh pattern To remain host backward compatible the card expects a sector buffer of data from the host to follow the command with the same...

Page 59: ...on bit significant information 1 XXXXh 2 Default number of cylinders 2 0000h 2 Reserved 3 XXXXh 2 Default number of heads 4 0000h 2 Number of unformatted bytes per track 5 0000h 2 Number of unformatte...

Page 60: ...ycle time per word in ns 66 0078h IDE Mode only 2 Recommended multiword DMA transfer cycle time per word in ns 67 0078h 2 Minimum PIO transfer without flow control 68 0078h 2 Minimum PIO transfer with...

Page 61: ...anslation mode This value will be the same as the number of cylinders Word 3 Default Number of Heads This field contains the number of translated heads in the default translation mode Word 4 Number of...

Page 62: ...specified in Table 3 15 with the contents of this field with Table 3 14 t0 is the minimum total cycle time t2 is the minimum command active time and t2i is the minimum command recovery time or command...

Page 63: ...h Card in LBA mode only Word 64 Advanced PIO Transfer Modes Supported Bits 0 and 1 of this field are set to indicate support for PIO transfer modes 3 and 4 respectively Word 65 Minimum Multiword DMA T...

Page 64: ...ovable Media feature set not supported 3 1 Power Management feature set supported 4 0 Packet Command feature set not supported 5 1 Write cache supported 6 1 Look ahead supported 7 0 Release Interrupt...

Page 65: ...not supported 11 Obsolete 12 1 Write Buffer command supported by CF Card 13 1 Read Buffer command supported by CF Card 14 1 NOP command supported by CF Card 15 Obsolete Table 5 12 Word 86 Description...

Page 66: ...ode Timing Supported 0 Specified in Word 63 1 Multiword DMA Mode 3 2 Multiword DMA Mode 4 3 7 Reserved Bits 8 6 Advanced True IDE PIO Mode Selected Indicates the current True IDE PIO mode selected on...

Page 67: ...aximum Memory timing mode supported by the card Value Maximum Memory Timing Mode Supported 0 250 ns Cycle Memory Mode 1 120 ns Cycle Memory Mode 2 100 ns Cycle Memory Mode 3 80 ns Cycle Memory Mode 4...

Page 68: ...linder Only the Sector Count and the Card Drive Head registers are used by this command NOTE SanDisk recommends not using this command in any system because DOS determines the offset to the Boot Recor...

Page 69: ...d except for the following The host initializes the DMA channel prior to issuing the command Data transfers are qualified by DMARQ and are performed by the DMA channel The device issues only one inter...

Page 70: ...l block transfer The partial block transfer is for n sectors where n sector count module block count If the Read Multiple command is attempted before the Set Multiple Mode command has been executed or...

Page 71: ...count of 0 requests 256 sectors The transfer begins at the sector specified in the Sector Number Register When this command is issued and after each sector of data except the last one has been read b...

Page 72: ...16 Cyl Low 4 Cylinder Low LBA 15 8 Sec Num 3 Sector Number LBA 7 0 Sec Cnt 2 Sector Count Feature 1 X 5 1 15 Recalibrate 1XH This command is effectively a NOP command to the CompactFlash Memory Card a...

Page 73: ...ss too large 35h 36h Supply or generated voltage out of tolerance 11h Uncorrectable ECC error 18h Corrected ECC error 05h 30 34h 37h 3Eh Self test or diagnostic failed 10h 14h ID not found 3Ah Spare s...

Page 74: ...ble Read Look Ahead 66h Disable Power on Reset POR establishment of defaults at Soft Reset 69h Accepted for backward compatibility with the SDP Series but has no impact on the CF Memory Card 81h Disab...

Page 75: ...cepted for backward compatibility with the SDP Series but has no impact on the card SanDisk does not recommend the use of this command in new designs Features 66H and CCH can be used to enable and dis...

Page 76: ...le 5 28 Set Multiple Mode Bit 7 6 5 4 3 2 1 0 Command 7 C6H C D H 6 X Drive X Cyl High 5 X Cyl Low 4 X Sec Num 3 X Sec Cnt 2 Sector Count Feature 1 X 5 1 20 Set Sleep Mode 99H E6H This command causes...

Page 77: ...esponds to the ATA Standby Mode clear BSY and return the interrupt immediately Recovery from sleep mode is accomplished by simply issuing another command reset is not required Table 5 31 Standby Immed...

Page 78: ...cts The Sector Count Register will always be returned with an 00H indicating Wear Level is not needed Table 5 34 Wear Level Bit 7 6 5 4 3 2 1 0 Command 7 F5H C D H 6 X X X Drive Flag Cyl High 5 X Cyl...

Page 79: ...ead of 512 bytes Only single sector Write Long operations are supported The transfer consists of 512 bytes of data transferred in word mode followed by 4 bytes of ECC transferred in byte mode Because...

Page 80: ...ctors where n remainder sector count block count If the Write Multiple command is attempted before the Set Multiple Mode command has been executed or when Write Multiple commands are disabled the Writ...

Page 81: ...fer fill operation No data should be transferred by the host until BSY has been cleared by the host For multiple sectors after the first sector of data is in the buffer BSY will be set and DRQ will be...

Page 82: ...start the first buffer fill operation No data should be transferred by the host until BSY has been cleared by the host For multiple sectors after the first sector of data is in the buffer BSY will be...

Page 83: ...V V V V V V V V Read Long Sector V V V V V V V V V Read Sector s V V V V V V V V V V Read Verify Sectors V V V V V V V V V V Recalibrate V V V V V Request Sense V V V V Seek V V V V V V Set Features V...

Page 84: ...ATA Command Description SanDisk CompactFlash Card OEM Product Manual This page intentionally left blank 02 07 Rev 12 0 5 30 2007 SanDisk Corporation...

Page 85: ...onditions Info Tuple Tuple Code 00Eh 04h Link is 4 Bytes Link to Next Tuple 010h 03h Reserved 0 VCC W A I T Conditions 3Voperation is allowed and WAIT is used 3 V Operation Wait Function 012h D9h DevI...

Page 86: ...EIDA 4 1 Major Version 032h 01h TPPLV1_MINOR PCMCIA 2 0 JEIDA 4 1 Minor Version 034h 53h ASCII Manufacturer String S String 1 036h 61h a a 038h 6Eh n 03Ah 44h D 03Ch 69h i 03Eh 73h s 040h 6Bh k 042h 0...

Page 87: ...45 00 01 064h 08h R R R R E TPR TAR R8 R8 8 bit ROM present SanDisk 0 0 0 0 1 0 0 0 TAR Temp Bsy on AT Reset Fields 1 to 4 bytes limited TPR Temp Bsy on by link length PCMCIA Reset E Erase Ahead Avail...

Page 88: ...Type for Disk 07Eh 0Ch R 0 R 0 R 0 R 0 U 1 S 1 V 0 Unique Manufacturer Serial Number com bined string Basic ATA Option Parameters V 0 No Vpp Required V 1 Vpp on Modified Media V 2 Vpp on Any Operatio...

Page 89: ...edat200h in Reg Space Location of Config Registers 08Ch 02h TPCC_RADR MSB 08Eh 0Fh R 0 R 0 R 0 R 0 S 1 P 1 C 1 I 1 First 4 Configuration Registers are present TPCC_RMSK I Configuration Index C Configu...

Page 90: ...em Space Info type M Misc Info Byte s present 09Ah 27h R DI PI AI SI HV LV NV Nominal Voltage follows Power 0 0 1 0 0 1 1 1 NV Nominal Voltage LV Mimimum Voltage Parameters for VCC HB Maximum Voltage...

Page 91: ...Configuration Index Memory Mapped I O TPCE_INDX 0 0 0 3 3V Configuration 0B0h 01h M MS IR IO T P P Power Info type TPCE_FS 0 0 0 0 0 1 0B2h 21h R DI PI AI SI H LV NV PI Peak Current TPCE_PD 0 0 1 0 0...

Page 92: ...but Wait not used for TPCE_IF memory cycles B Battery Volt Detects Used P Write Protect Used R Ready Busy Used W Wait Used for Memory Cycles 0C2h 99h M MS IR IO T P VCC Only Power TPCE_FS 1 0 1 1 0 1...

Page 93: ...l of the selection TPCE_IO decoding IO AddrLines lines decoded E 8 bit Only Hosts Supported S 16 bit Hosts Supported R Range follows 0D0h F0h S 1 P 1 L 1 M 1 V 0 B 0 I 0 N 0 IRQ Sharing Logic Active i...

Page 94: ...nfo type TPCE_FS 0 0 0 0 0 1 0E0h 21h R 0 DI 0 PI 1 AI 0 SI 0 HV 0 LV 0 NV 1 PI Peak Current NV Nominal Operation Supply Voltage Power Parameters for VCC 0E2h B5h X Mantissa Exponent Nominal Operation...

Page 95: ...er Info type T Timing Info present IO I O Port Info present IR Interrupt Info present MS Memory Space Info type M Misc Info Byte s present 0F2h 27h R DI PI AI SI HV LV NV Nominal Voltage follows Power...

Page 96: ...r of Ranges is 2 Size of each address is 2 bytes size of each length is 1 byte I O Range Format Description AS Size of Addresses 0 No Address Present 1 1Byte 8 bit Addresses 2 2Byte 16 bit Addresses 3...

Page 97: ...1 Power Down and Twin Card TPCE_MI T Twin Cards Allowed A Audio Supported RO Read Only Mode P Power Down Supported R Reserved X More Misc Fields Bytes 110h 1Bh CISTPL_CE Configuration Entry Tuple Tup...

Page 98: ...Index 3 AT Fixed Disk Secondary I O Address Configuration TPCE_INDX Configuration Index for this entry is 3 Interface Byte follows this byte Default Configuration 126h 41h W 0 R 1 P 0 B 0 Interface Ty...

Page 99: ...s 5V VCC Nominal 0 Ah 5 0 5h 1V Value 12Eh 4Dh X Mantissa Exponent VCC Nominal is 4 5V VCC Min 0 9h 4 5 5h 1V Value 130h 5Dh X Mantissa Exponent VCC Nominal is 5 5V VCC Max 0 Bh 5 5 5h 1V Value 132h 7...

Page 100: ...hs 138h 70h 1st I O Base Address LSB First I O Range Base is 170h 13Ah 01h 1st I O Base Address MSB 13Ch 07h 1st I O Range Length 1 8 Bytes Total 170 177h I O Length 1 13Eh 76h 2nd I O Base Address LS...

Page 101: ...P Power Info type TPCE_FS 0 0 0 0 0 1 150h 21h R 0 DI 0 PI 1 AI 0 SI 0 HV 0 LV 0 NV 1 PI Peak Current NV Nominal Operation Supply Voltage Power Parameters for VCC 152h B5h X Mantissa Exponent Nominal...

Page 102: ...t Description CIS Function 164h 014h CISTPL_NO_LINK Prevent scan of common memory Tuple Code 166h 000h No Bytes following Link Length is 0 Bytes Link to Next Tuple 168h 0FFh End of Tuple Chain End of...

Page 103: ...1 024 966 656 2 001 888 16 63 1 986 SDCFH 2048 388 2048 MB 2 048 901 120 4 001 760 16 63 3 970 SDCFH 4096 388 4096 MB 4 110 188 544 8 027 712 16 63 7 964 SDCFH 8192 388 8192 MB 8 195 604 480 16 007 04...

Page 104: ...Ordering Information SanDisk CompactFlash Card OEM Product Manual This page intentionally left blank Rev 12 0 02 07 A 2 2007 SanDisk Corporation...

Page 105: ...LOGY OR SERVICES IN NO EVENT SHALL THE SELLER BE LIABLE FOR DAMAGES IN EXCESS OF THE PURCHASE PRICE OF THE PRODUCT ARISING OUT OF THE USE OR INABILITY TO USE SUCH PRODUCT TO THE FULL EXTENT SUCH MAY B...

Page 106: ...y as new products provided such cards meet or exceed the same published specifications as new products Concurrently SanDisk also reserves the right to market any products whether new repaired or rebui...

Page 107: ...life the products should only be incorporated in systems designed with appropriate redundancy fault tolerant or back up features SanDisk shall not be liable for any loss injury or damage caused by us...

Page 108: ...Disclaimer of Liability SanDisk CompactFlash Card OEM Product Manual This page intentionally left blank 02 07 Rev 12 0 C 2 2007 SanDisk Corporation...

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