Samsung VP-D371, Service Manual

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Circuit Operating Description
Samsung Electronics 13-7
13-4 H/W demand matter
13-4-1 Main PCB H/W demand matter
Main PCB carries out record reproduction of the input of the signal into which the optical signal was
electrically changed from CCD of CAMERA LENS ASS’Y, and an AUDIO signal by DV FORMAT at
6.35mm Tape.
It consists of circuits PCB which save or DISPLAY by JEPG and MPEG4 to MEMORY STICK. It constitutes
from the CAMERA circuit BLOCK, SYSCON/SERVO BLOCK, DV_1_CHIP BLOCK, DC/DCBLOCK,
PREAMP BLOCK, PRML BLOCK, and AUDIO/VIDEO I/F BLOCK.
13-4-2 Camera circuit Block H/W requirement
The CAMERA circuit BLOCK carries out CDS->AGC->10 Bits A/D conversion of Ccd_out Signal by
which electronic conversion was carried out from Camera Lens Ass’y.
LUMINANCE and CHROMINANCE are transformed by ITU-R 656 Format.
It is made to output by DV-1 CHIP.
It was inputted into ITU-R 656 FORMAT from DV-1 CHIP. A DIGITAL EFFECT function (PB ZOOM,
PB MOSAIC, PB MIRROR) is carried out for a VIDEO signal.
Signal inputted from CAMERA LENS or DV-1 CHIP MEMORY STICK preservation / DISPLAY is
carried out by JPEG and MPEG4 FORMAT.
54MHz
(XM01)
48MHz
(XM02)
EEOPROM
ICM15
BU7807
(IC601)
AUDIO IF
VSP2572
(ICP02)
CDS/AGC
/ADC
UPD168103
(ICP03)
ZOOM/FOCUS
MOTOR DRIVER
CCD-OUT
S5C7377A(ICM01)
DSP07
DIS/JPEG/MPEG4/USB
DV1 CHIP(IC201)
GLOBILi
ZOOM MOTOR
FOCUS MOTOR
K4S2832833F-EE75
ICA02
64M SDRAM
MEM29
L
V1160BE
(ICA03)
4M FLASH MEMORY
USB Port
SD/MMC/MS Card
TMP1962(IC501)
MICOM
CCD_OUT
12Bit(A0~A11)
32Bit DATA(XD0~XD31)
24Bit ADDR(XA1~XA24)
DP/DM
8Bit DATA
(MS_DAT 0~3, SD_DAT 0~3)
AV Sigual
DATA/ADDR Signal
Control Signal
Fig. 13-5 Camera Circuit Block Diagram