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ADDRESS SPACE
S3F80P5_UM_ REV1.00
SYSTEM AND USER STACKS
S3C8-series microcontrollers use the system stack for subroutine calls and returns and to store data. The PUSH
and POP instructions are used to control system stack operations. The S3F80P5 architecture supports stack
operations in the internal register file.
Stack Operations
Return addresses for procedure calls, interrupts and data are stored on the stack. The contents of the PC are
saved to stack by a CALL instruction and restored by the RET instruction. When an interrupt occurs, the contents
of the PC and the FLAGS registers are pushed to the stack. The IRET instruction then pops these values back to
their original locations. The stack address value is always decreased by one before a push operation and
increased by one after a pop operation. The stack pointer (SP) always points to the stack frame stored on the top
of the stack, as shown in Figure 2-15.
Stack contents
after a call
instruction
Stack contents
after an
interrupt
Top of
stack
Flags
PCH
PCL
PCL
PCH
Top of
stack
Low Address
High Address
Figure 2-16. Stack Operations
User-Defined Stacks
You can freely define stacks in the internal register file as data storage locations. The instructions PUSHUI,
PUSHUD, POPUI, and POPUD support user-defined stack operations.
Stack Pointers (SPL)
Register location D9H contains the 8-bit stack pointer (SPL) that is used for system stack operations. After a
reset, the SPL value is undetermined. Because only internal memory 256-byte is implemented in The S3F80P5,
the SPL must be initialized to an 8-bit value in the range 00–FFH.
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Summary of Contents for S3F80P5X
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Page 122: ...INTERRUPT STRUCTURE S3F80P5_UM_ REV1 00 NOTES 5 18 ...
Page 210: ...INSTRUCTION SET S3F80P5_UM_ REV1 00 NOTES 6 88 ...
Page 216: ...CLOCK AND POWER CIRCUITS S3F80P5_UM_ REV1 00 NOTES 7 6 ...
Page 266: ...COUNTER A S3F80P5_UM_ REV1 00 NOTES 12 8 ...
Page 290: ...EMBEDDED FLASH MEMORY INTERFACE S3F80P5_UM_ REV1 00 NOTES 14 18 ...
Page 321: ...DEVELOPMENT TOOLS S3F80P5_UM_ REV1 00 NOTES 19 10 ...