UPS25 27
RTD Embedded Technologies, Inc
UPS control circuitry
The UPS25 status can be monitored through the 4 bit Status register.
A host interrupt can be asserted in the case that the main power VIN drops below
the set trip-point, factory set to 10V. This interrupt can be disabled or enabled by
the IRQ-enable bit (#0 of the control register). In case the interrupt is disabled you
can monitor the status of the input power by polling the control register.
Note that the control circuitry is not powered from the +5V onboard step-down
converter, but from the PC/104 bus.