CMX37786HX
RTD Embedded Technologies, Inc.
76
Reg_Enable
Set this bit to ‘1’ to enable the Watchdog Runtime Register. Set to ‘0’ to disable.
When Disabled, the Watchdog Runtime Register does not appear in the I/O map, and
interrupts and resets are not generated by the Watchdog Timer.
aDIO/Watchdog Setup Register (I/O Port 0x1F)
aDIO_Base[2:0] Selects the base address for aDIO and the Watchdog Timer based on the following ta-
ble:
Watchdog Runtime Register
The location of this register is determined by aDIO/WDT_Setup[aDIO_Base]. Reading this register also re-
freshes the watchdog timer.
WDT_Active
Set this bit to ‘1’ to activate the Watchdog Timer interrupts and resets. Set to ‘0’ to
disable. When disabled, the watchdog timer does not need to be refreshed.
WDT_IRQ_Ena Set this bit to ‘1’ to enable the Watchdog interrupt. Set to ‘0’ to disable.
101
IRQ12
110
Reserved
111
Reserved
aDIO/WDT_Setup
D7
D6 D4
D3
D2 D0
Reserved
aDIO_Base
Reserved
aDIO_Irq
r
r/w
r/w
r/w
0
0
set by BIOS
0
aDIO_Base[2:0]
aDIO Base
I/O Address
Watchdog Timer Runtime
Register I/O Address
000
0x450
0x454
001
0x440
0x444
010
0x410
0x414
011
0x400
0x404
100
0x350
0x354
101
0x340
0x344
110
0x310
0x314
111
0x300
0x304
WDT_Runtime
D7
D6
D5
D4
D3 D2
D1 D0
WDT_Active
WDT_IRQ_Ena
Reserved
Reserved
WDT_IRQ_Ena
WDT_RST_Time
r/w
r/w
r
r
r/w
r/w
0
0
0
0
0
0
(Continued)
WDT_IRQ[2:0]
Interrupt
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