rtd CMX37786HX, User Manual

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CMX37786HX RTD Embedded Technologies, Inc.
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The following table lists signals of the AT portion of the PC/104 bus.
Notes:
•ISA bus refresh is not supported by this cpuModule.
•ISA Masters are not supported by this cpuModule
•Keying pin positions have the pin cut on the bottom of the board and the hole plugged
in the connector to prevent misalignment of stacked modules. This is a feature of the
PC/104 specification and should be implemented on all mating PC/104 modules.
•Signals marked with (*) are active-low.
•All bus lines can drive a maximum current of 4 mA at TTL voltage levels.
PC/104 Bus Signals
The following table contains brief descriptions of the PC/104 bus signals.
Table 25: PC/104 AT Bus Connector,
CN2
Pin Row C Row D
0 0V 0V
1 SBHE* MEMCS16*
2 LA23 IOCS16*
3 LA22 IRQ10
4 LA21 IRQ11
5 LA20 IRQ12
6 LA19 IRQ15
7 LA18 IRQ14
8 LA17 DACK0*
9 MEMR* DRQ0
10 MEMW* DACK5*
11 SD8 DRQ5
12 SD9 DACK6*
13 SD10 DRQ6
14 SD11 DACK7*
15 SD12 DRQ7
16 SD13 +5V*
17 SD14 MASTER*
18 SD15 0V
19 (Keying pin) 0V
Table 26: PC/104 Bus Signals
Signal I/O Description
AEN O Address ENable: when this line is active (high), it means a DMA trans-
fer is being performed, and therefore, the DMA controller has control
over the data bus, the address bus, and the control lines.
BALE O Bus Address Latch Enable, active high. When active, it indicates that
address lines SA0 to SA19 are valid.