rtd CMX37786HX, User Manual

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CMX37786HX RTD Embedded Technologies, Inc.
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Interrupts:
The Digital I/O can use interrupts 5, 7, 10, 11, and 12. The mapped interrupt numbers are 0x0D,
0x0F, 0x72, 0x73, and 0x74 in HEX respectfully or 13, 15, 114, 115, and 116 in decimal respectful-
ly. To use any of the 5 listed interrupts set the interrupt aside for an ISA legacy device. To set the
interrupts aside enter the BIOS under PNP/PCI CONFIGURATION. Select Resources Controlled
By and change the interrupt(s) you wish to use to Legacy ISA. The interrupts you wish to use must
then be selected in the Integrated Peripherals section of the BIOS under aDIO IRQ.
Advanced Digital Interrupts:
There are three advanced digital interrupt modes available. These three modes are Event, Match,
and Strobe. The use of these three modes is to monitor state changes at the DIO connector. The
three modes are selected with bits D[4:3] of the DIO-Control Register.
Event Mode:
When this mode is enable, Port 0 is latched into the DIO-Compare register at 8.33 MHz. There is a
deglitching circuit inside the DIO circuitry. The deglitching requires pulses on Port 0 to be at least
120 nanoseconds in width. As long as changes are present longer than that, the event is guaranteed
to register. Pulses as small as 60 nanoseconds can register as an event but they must occur between
the rising and falling edge of the 8.33 MHz clock. To enter Event mode, set bits D[4:3] of the DIO-
Control register to a “10”.
Match Mode:
When this mode is enabled, Port 0 is latched into the DIO-Compare register at 8.33 MHz. There is
a deglitching circuit inside the DIO circuitry. The deglitching requires pulses on Port 0 to be at least
120 nanoseconds in width. As long as changes are present longer than that, the match is guaranteed
to register. Pulses as small as 60 nanoseconds can register as a match but they must occur between
the rising and falling edge of the 8.33 MHz clock. To enter Match mode, set bits D[4:3] of the DIO-
Control register to “11”.
Make sure bit 3 is set BEFORE writing the DIO-Compare
register. If you do not set bit 3 first, the contents of the
DIO-Compare register could be lost. The reason for this is
that Event mode latches in Port 0 into the DIO-Compare
register at an 8.33 MHz rate.