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User’s Guide
BD96801-SPA7-EVK-301
© 2022 ROHM Co., Ltd.
65UG018E Rev.001
July 2022
information can be obtained by reading out the PMIC’s status registers via an I2C-USB controller board.
Digital part:
The system power supply is ok when LED100 to LED102 are off and LED60 is on.
That is a requirement for the digital part of the EVK (FPGA system) to start up.
Failures could occur when programming the onboard EEPROM in a non-suitable way. It is not recommended to change the sequencing
or the output voltage level of the PMIC outputs by EEPROM programming. This could lead to destruction of the digital part.
Another source of failure of the digital part is an erroneous FPGA software. In this case, reflash the FPGA code into the onboard NOR
flash memory via JTAG programmer.
Failure description
Solution
None of the LEDs are on.
Check if DC input power (10V to 24V) is connected to power connector.
Check if 5V of BD9F500 is present (TP3 and TP4).
LED100 (INTB), LED101 (ERRB)
and/or LED102 (PRSTB) is on.
Remove EN- and STBY jumpers from CN130. Re-insert first STBY jumper (position 1-2) and
then EN-jumper (position 3-4).
For further diagnosis: connect external I2C-USB controller board to Spartan-7 EVK and to
PC/laptop. Read status registers of PMIC BD96801. PMIC 7-bit slave address is 0x60h. See
data sheet of PMIC for register details.
LED301 or LED302 is on, or
LED303 or LED304 is off.
Press SW304 (PROGRAM_B) to re-transfer FPGA code from onboard Flash memory to Xilinx
FPGA.
Press SW301 (Reset) to restart Xilinx FPGA.
Check if all system voltages are present (test points TP20, TP40, TP100, TP102, TP120,
TP121, TP122 vs. GND (e.g.: TP4).
LED501 is not flashing and/or
LED502 is off.
Make sure that system switch SW302 (OSC) is in position “High”.
It could be that default Xilinx FPGA software, which resides in the onboard NOR flash memory,
was modified/overwritten. Reflash onboard flash memory, e.g. with Vivado Design Tool software
and JTAG program adapter (e.g. Xilinx “Platform Cable USB II”).
Table 6: troubleshooting
