ML7404 Family LSIs
Hardware Design Manual
FEXL7404DG-03
2
Notes the following when placing decoupling capacitors:
1. The VDD and GND traces should be wider than other signal line traces to reduce the resister element.
2. Decoupling capacitor should be placed as close to an LSI pin as possible.
3. The smaller capacitor should be closer to an LSI pin than other capacitors.
4. VDDIO (#9), VDD_PA (#22), VDD_REG (#1) pins connected to the VDD share the trace.
5. A 1
µ
F decoupling capacitor should be placed to the REG_CORE (#4) pin to stabilize 1.5V regulator.
6. The VBG (#2) pin is a reference voltage output pin of band-gap reference circuit. Placing a
0.1μF
multilayer ceramic capacitor to the VBG (#2) pin to reduce the noise from the band-gap reference
circuit.
