Rohm LAPIS Semiconductor ML7404 Series, Hardware Design Manual

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ML7404 Family LSIs
Hardware Design Manual
FEXL7404DG-03
5
2.2. TCXO circuit (ML7404)
Please use a TCXO that satisfy the following specification.

Output load: 10k
Ω//10pF

Output level: 0.8Vpp to 1.5Vpp

Frequency accuracy: below ±10ppm
The ML7404 has integrated bias circuit and the DC bias is applied to the TCXO (#6) pin. A 0.1uF capacitor
should be placed on the TCXO line as following.
In ML7404, #5 pin is N.C. pin, then it should be open.
Figure 2.2.1 External oscillator circuit (TCXO) configurations
2.3. Frequency tolerance of Input Clock
Table 2.1.1Relationship between Use case and frequency tolerance of reference clock
Use case
Unit
1 2 3 4 5 6 7
Sigfox Yes Yes Yes No Yes No No
IEEE802.15.4k Yes Yes No Yes No Yes No
IEEE802.15.4g
(ARIB STD T-108)
Yes No Yes Yes No No Yes
Recommended clock
source
Frequency tolerance
[1]
(36MHz)
TCXO
±3
TCXO
±3
TCXO/XO
±20
TCXO
±3
TCXO/XO
±20
TCXO
±3
TCXO/XO
±20 ppm
[1] Frequency tolerance is indicated by the sum of the following 3 items.
A. Initial frequency tolerance
B. Frequency/Temperature characteristics
C. Long-term Frequency stability
It is possible to compensate the item A(Initial frequency tolerance) by adjusting the frequency of transmission /
reception in ML7404. When adjusting the initial frequency tolerance for each set, the frequency tolerance
required for reference clock source is only the sum of B and C.
TCXO
36MHz
0.1uF
TCXO(#6)
Bias
N.C.(#5)