BU94603KV Functional Specifications
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Target Spec 0.12
V.10 KEY input format
3x4 matrix command input
Signal name I/O
Function
Remarks
KEY_ROW1
I
KEY matrix I/O signal
-
KEY_ROW2
I
-
KEY_ROW3
I
-
KEY_ROW4
I
-
KEY_COL1
O
-
KEY_COL2
O
-
KEY_COL3
O
-
Configure a circuit for the matrix signals terminals for KEY commands as shown in the applied circuit
diagram V.10.
The operation corresponding to the key pressed over the circuit is performed.
Details of each operation are explained in Chapter VI.2.
Figure V.10 KEY Matrix Applied Circuit Diagram
V.11 I2C interface format
I2C serial interface
Signal name I/O
Function
Remarks
SCL
I I2C interface clock input
-
SDA
I/O I2C interface data I/O
-
A0
I Slave address selection terminal
Slave address [0] bit setting terminal
A1
I Slave address selection terminal
Slave address [1] bit setting terminal
This is an I2C serial interface terminal. By inputting L to SEL_SLAVE terminal, the interface terminal
becomes enabled.
The terminal supports slave I2C operation.
V.11.1 I2C protocol
When I2C bus is in IDLE, SDA and SCL are set to H by the external Pull-up resistance. When starting
communications, the master sets SDA to L while SCL is set to H (Start condition). When ending
communications, the master sets SDA to H while SCL is set to H (Stop condition). Even before sending
Stop condition at the end of communications, transfer of Start condition allows restart of communications
(Repeated Start Condition). During transfer, SDA is changed only when SCL is set to L. Figure V.11.1
shows Start condition, Stop condition, Repeated Start condition of I2C.
KEY_
ROW1
PLAY/
PAUSE
STOP
FF
FB
KEY_
ROW2
KEY_
ROW3
KEY_
ROW4
KEY_
COL1
KEY_
COL2
KEY_
COL3
VOL+
FOL-
FOL+
VOL-
REPEAT
RANDOM
CHG_DEV
+10