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Cautions on use 

 

1) Absolute Maximum Ratings 

An excess in the absolute maximum ratings, such as supply voltage ( Vmax ), temperature range of operating 
conditions ( Topr ), etc., can break down devices, thus making impossible to identify breaking mode such as a short 
circuit or an open circuit. If any special mode exceeding the absolute maximum ratings is assumed, consideration 
should be given to take physical safety measures including the use of fuses, etc. 

 
2) GND voltage 

Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state. 
Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual 
electric transient. 

 
3) Short circuit between terminals and erroneous mounting 

In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous 
mounting can break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between 
terminals or between the terminal and the power supply or the GND terminal, the ICs can break down. 

 
4) Operation in strong electromagnetic field 

Be noted that using ICs in the strong electromagnetic field can malfunction them. 

 
5) Inspection with set PCB   

On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer 
stress. Therefore, be sure to discharge from the set PCB by each process. Furthermore, in order to mount or 
dismount the set PCB to/from the jig for the inspection process, be sure to turn OFF the power supply and then 
mount the set PCB to the jig. After the completion of the inspection, be sure to turn OFF the power supply and then 
dismount it from the jig. In addition, for protection against static electricity, establish a ground for the assembly 
process and pay thorough attention to the transportation and the storage of the set PCB. 

 
6) Input terminals 

In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of 
the parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then 
breakdown of the input terminal. Therefore, pay thorough attention not to handle the input terminals; such as to 
apply to the input terminals a voltage lower than the GND respectively, so that any parasitic element will operate. 
Furthermore, do not apply a voltage to the input terminals when no power supply voltage is applied to the IC. In 
addition, even if the power supply voltage is applied, apply to the input terminals a voltage lower than the power 
supply voltage or within the guaranteed value of electrical characteristics. 

 
7) Thermal design 

Perform thermal design in which there are adequate margins by taking into account the power dissipation ( Pd ) in 
actual states of use. 

 
8) Treatment of package 

Dusts or scratch on the photo detector may affect the optical characteristics. Please handle it with care. 

 
9) Rush current 

When power is first supplied to the CMOS IC, it is possible that the internal logic may be unstable and rush current 
may flow instantaneously. Therefore, give special consideration to power coupling capacitance, power wiring, width 
of GND wiring, and routing of connections. 
 

10) The exposed central pad on the back side of the package 

There is an exposed central pad on the back side of the package. But please do it non connection. ( Don't    solder, 
and don't do electrical connection ) Please mount by Footprint dimensions described in the Jisso Information for 
WSOF6. This pad is GND level, therefore there is a possibility that LSI malfunctions and heavy-current is 
generated.

 

 

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Summary of Contents for BH1715FVC

Page 1: ...ncy is little ex Incandescent Lamp Fluorescent Lamp Halogen Lamp White LED Sun Light 10 It is possible to select 2 type of I 2 C slave address 11 Adjustable measurement result for influence of optical...

Page 2: ...1 8V SCL SDA Input H Voltage 2 VIH2 1 26 V 1 65V DVI 1 8V SCL SDA Input L Voltage 1 VIL1 0 3 DVI V DVI 1 8V SCL SDA Input L Voltage 2 VIL2 DVI 1 26 V 1 65V DVI 1 8V SCL SDA ADDR Input H Current IIH 1...

Page 3: ...ite LED Ratio H Res L Res 0 8 16 24 32 40 48 56 64 0 8 16 24 32 40 48 56 64 Illuminance lx Measurement Result H Res L Res H Res 1pin 1pin 0 0 2 0 4 0 6 0 8 1 1 2 400 500 600 700 800 900 1000 1100 Wave...

Page 4: ...Measurement Time Register This is for registration of measurement time Initial Value is 0100_0101 z OSC Internal Oscillator typ 320kHz It is CLK for internal logic Measurement Procedure Power On Comma...

Page 5: ...Low bit 011_MT 4 3 2 1 0 Change measurement time Please refer adjust measurement result for influence of optical window Don t input the other opecode Measurement mode explanation Measurement Mode Mea...

Page 6: ...ommended Timing chart1 for VCC and DVI supply Timing chart2 for VCC and DVI supply If DVI rises within 1us after VCC supply VCC DVI Reset Term more than 1us VCC DVI Don t care state ADDR SDA SCL is no...

Page 7: ...rement mode is updated 120ms typ at H resolution mode 16ms typ at L resolution mode ex2 One time L resolution mode ADDR H Send One time L resolution mode instruction ST 1011100 0 Ack 00100011 Ack SP W...

Page 8: ...lease refer to the paragraph of Timing chart for VCC and DVI power supply sequence about the terminal ADDR design ex 1 The control signal line such as CPU is connected ex 2 Reset IC is used 1 For Rese...

Page 9: ...not enough long after turning off VCC It is necessary to consider DVI voltage level after turning off VCC Example of designing set when CR C 1uF R 1k is inserted between VCC and DVI with VCC 2 8V The...

Page 10: ...pt plural command without stop condition Please insert SP every 1 Opecode ST Slave Address R W 0 Ack Opecode Ack SP 4 Read Format ST Slave Address R W 1 Ack High Byte 15 8 2 15 2 14 2 13 2 12 2 11 2 1...

Page 11: ...ing High bit of Mtreg ST Slave Address R W 0 Ack 01000_100 Ack SP 2 Changing Low bit of Mtreg ST Slave Address R W 0 Ack 011_01010 Ack SP 3 Input Measurement Command ST Slave Address R W 0 Ack 0001_00...

Page 12: ...VCC and DVI supply procedure Please see P6 3 GND GND Terminal 4 SDA I 2 C bus Interface SDA Terminal 5 DVI SDA SCL Reference Voltage Terminal And DVI Terminal is also asynchronous Reset for internal...

Page 13: ...0 8 mm 1 3 mm PD area 0 25 mm x 0 3 mm Please design the optical window so that light can cover at least this area Min 0 4 mm Min 0 4 mm Min 0 4 mm Min 0 4 mm WSOF6 Unit mm A D Lot No Production code...

Page 14: ...st static electricity establish a ground for the assembly process and pay thorough attention to the transportation and the storage of the set PCB 6 Input terminals In terms of the construction of IC p...

Page 15: ...e 3000pcs The direction is the 1pin of product is at the upper right when you hold reel on the left hand and you pull out the tape on the right hand Tape and Reel information TR When you order please...

Page 16: ...ion design Appendix1 Rev2 0 Thank you for your accessing to ROHM product informations More detail product informations and catalogs are available please contact your nearest sales office ROHM Customer...

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