RME Audio ADI-192 DD, User Manual

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User's Guide ADI-192 DD © RME
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9.2 Technical Description and Background
In the analog domain one can connect any device to another device, synchronisation is not
necessary. Digital audio is different. It uses a clock, the sample frequency. The signal can only
be processed and transmitted when all participating devices share the same clock. If not, the
signal will suffer from wrong samples, distortion, crackle sounds and drop outs.
AES/EBU, SPDIF, ADAT and MADI are self-clocking (seen from a non-technical view TDIF too,
as word clock is embedded inside the TDIF cable), an additional word clock connection in prin-
ciple isn't necessary. But when using more than one device simultaneously problems are likely
to happen. For example any self-clocking will not work in a loop cabling, when there is no 'mas-
ter' (main clock) inside the loop. Additionally the clock of all participating devices has to be syn-
chronous. This is often impossible with devices limited to playback, for example CD players.
Finally there are 'problematic' devices, which are nearly un-usable without a word clock at-
tached anyway.
In digital studios, synchronization requirements can be met by connecting all devices to a cen-
tral sync source. For instance, the master device could be a mixing desk, sending a reference
signal - word clock - to all other devices. However, this will only work if all the other devices
have word clock or sync inputs (e.g. some professional CD-players), allowing them to run as
slaves. This being the case, all devices will receive the same clock signal, so there is no fun-
damental reason for sync problems when they are connected together.
Remember that a digital system can only have one master! If the ADI-192 DD's clock mode
is set to 'Master', all other devices must be set to ‘Slave’.
But word clock is not only the 'great problem solver', it also has some disadvantages. The word
clock is based on a fraction of the really needed clock. For example SPDIF: 44.1 kHz word
clock (a simple square wave signal) has to be multiplied by 256 inside the device using a spe-
cial PLL to about 11.2 MHz. This signal then replaces the one from the quartz crystal. Big dis-
advantage: because of the high multiplication factor the reconstructed clock will have great de-
viations called jitter. The jitter of a word clock is typically many times higher compared to a
quartz based clock.
The end of these problems should have been the so called Superclock, which uses 256 times
the word clock frequency. This equals the internal quartz frequency, so no PLL for multiplying is
needed and the clock can be used directly. But reality was different, the Superclock proved to
be much more critical than word clock. A square wave signal of 11 MHz distributed to several
devices - this simply means to fight with high frequency technology. Reflections, cable quality,
capacitive loads - at 44.1 kHz these factors may be ignored, at 11 MHz they are the end of the
clock network. Additionally it was found that a PLL not only generates jitter, but also rejects
disturbances. The slow PLL works like a filter for induced and modulated frequencies above
several kHz. As the Superclock is used without any filtering such a kind of jitter and noise sup-
pression is missing.
The actual end of these problems is offered by the
SteadyClock technology of the ADI-192 DD.
Combining the advantages of modern and fastest digital technology with analog filter tech-
niques, re-gaining a low jitter clock signal of 22 MHz from a slow word clock of 44.1 kHz is no
problem anymore. Additionally, jitter on the input signal is highly rejected, so that even in real
world usage the re-gained clock signal is of highest quality.
The usage of word clock with ADAT optical is critical too. The ADI-192 DD always uses a Bit-
clock PLL, no matter if the clock reference is word clock or ADAT. Thanks to its very fine resolu-
tion this exceptional circuit is able to follow the complete vari-speed range of the ADAT recorder
without losing a sample. Many other devices use a much coarser word clock PLL to track the
ADAT input. When changing the sample rate (speed) fast, some bits are already sampled inval-
idly before the frequency is corrected. Drop outs and crackling will be the audible result.