Renesas S3A1, User Manual

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Target Board Kit S3A1 (TB-S3A1) Hardware Layout
R12UM0022EU0100 Rev.1.00 Page 25 of 36
Feb 6, 2018
installation of capacitor C21 can reduce reference voltage noise and improve ADC measurement and DAC output
quality. The Target Board was designed for Samsung P/N CL10B104KB8NNNC, or similar, noise-bypass capacitors.
Port pair P012/P013 may be assigned as GPIO, where bypass capacitor C23 would damage signal quality. When
P012/P013 are to be assigned as VREFH/VREFL, installation of capacitor C23 may reduce reference voltage noise and
improve ADC measurement and DAC output quality. The Target Board was designed for Samsung P/N
CL10B104KB8NNNC, or similar, noise-bypass capacitors.
4.6.2 On-board clock crystals
The TB-S3A1 includes two precision crystal clock sources. A precision 12.000 MHz crystal is installed at location X1,
and a precision 32.768 kHz crystal is installed at location X2. These crystal clock sources are
connected to the Main MCU by default.
The MCU pins for the 12 MHz clock crystal may be connected to P212 and P213. To
disconnect the 12 MHz crystal, open copper jumpers E23 and E24, and close copper jumpers
E18 and E19.
The MCU pins for the 32.768 kHz clock crystal may be connected to P214 and
P215. To disconnect the 32.768 kHz crystal, open copper jumpers E25 and E26,
and close copper jumpers E22 and E27.
Figure 22 Crystal clock sources
4.6.3 User potentiometer
A footprint for installation of a potentiometer and a recommended noise-bypass capacitor are provided on the Target
Board. The footprint was designed for installation of a Bourns P/N 3352T-1-103LF, or equivalent, as the potentiometer,
and a Samsung P/N CL10B104KB8NNNC, or similar, as the noise-bypass capacitor.
When the User Potentiometer is installed, copper jumper E36 must be closed to connect the User
Potentiometer to the MCU.
Table 16 Target Board User Potentiometer
Designator Function MCU Control Port MCU Pin
POT1 User Potentiometer U1 P004 (AN004) U1-136