Quectel Smart LTE Module Series, Hardware Design

Page: 69 / 113

Smart LTE Module Series
SC650T Hardware Design
SC650T_Hardware_Design 68 / 131
for digital core circuit of
front camera
I
O
max=600mA
CSI0_CLK_N 89 AI
MIPI clock signal of rear
camera (negative)
CSI0_CLK_P 88 AI
MIPI clock signal of rear
camera (positive)
CSI0_LN0_N 91 AI
MIPI lane 0 data signal of
rear camera (negative)
CSI0_LN0_P 90 AI
MIPI lane 0 data signal of
rear camera (positive)
CSI0_LN1_N 93 AI
MIPI lane 1 data signal of
rear camera (negative)
CSI0_LN1_P 92 AI
MIPI lane 1 data signal of
rear camera (positive)
CSI0_LN2_N 95 AI
MIPI lane 2 data signal of
rear camera (negative)
CSI0_LN2_P 94 AI
MIPI lane 2 data signal of
rear camera (positive)
CSI0_LN3_N 97 AI
MIPI lane 3 data signal of
rear camera (negative)
CSI0_LN3_P 96 AI
MIPI lane 3 data signal of
rear camera (positive)
CSI2_CLK_N 78 AI
MIPI clock signal of front
camera (negative)
CSI2_CLK_P 77 AI
MIPI clock signal of front
camera (positive)
CSI2_LN0_N 80 AI
MIPI lane 0 data signal of
front camera (negative)
CSI2_LN0_P 79 AI
MIPI lane 0 data signal of
front camera (positive)
CSI2_LN1_N 82 AI
MIPI lane 1 data signal of
front camera (negative)
CSI2_LN1_P 81 AI
MIPI lane 1 data signal of
front camera (positive)
CSI2_LN2_N 84 AI
MIPI lane 2 data signal of
front camera (negative)
CSI2_LN2_P 83 AI
MIPI lane 2 data signal of
front camera (positive)
CSI2_LN3_N 86 AI
MIPI lane 3 data signal of
front camera (negative)
CSI2_LN3_P 85 AI
MIPI lane 3 data signal of
front camera (positive)