LTE-A Module Series
EM121R-GL Hardware Design
EM121R-GL Hardware Design 18 / 80
2.3. Functional Diagram
The following figure shows a functional diagram of EM121R-GL.
⚫
Power management
⚫
Baseband
⚫
LPDDR4X SDRAM + NAND Flash
⚫
Radio frequency
⚫
M.2 Key-B interface
(U)SIM2
(U)SIM1
USB 2.0 & USB 3.0
PCIe 2.0
×
1
ANT_GNSS
ANT_MAIN
38.4MHz XO
Qlink
Control
Tx
PRx
DRx
P
C
I
E
x
p
re
s
s
M
.2
K
e
y
-B
I
n
te
rf
a
c
e
FULL_CARD_POWER_OFF#
W_DISABLE2#
WWAN_LED#
WAKE_ON_WAN#
RFFE
W_DISABLE1#
GPIOs
ANT_DIV
GND
RESET#
VCC
S
P
M
I
B
B
_
C
L
K
1
9
.2
M
H
z
R
F
_
C
L
K
3
8
.4
M
H
z
E
B
I1
E
B
I2
PMIC
4Gb 8 bit NAND Flash
2Gb 16 bit LPDDR4X SDRAM
Baseband
T
ra
n
s
c
e
iv
e
r
T
x
/R
x
B
lo
c
k
s
E
T
GNSS
Figure 1: Functional Diagram