LTE Standard Module Series
EC25 Hardware Design
EC25_Hardware_Design 58 / 130
It is important to route the SDIO signal traces with total grounding. The impedance of SDIO data trace
is 50
Ω
(±10%).
Make sure the adjacent trace spacing is two times of the trace width and the load capacitance of
SDIO bus should be less than 15pF.
It is recommended to keep the trace length difference between CLK and DATA/CMD less than 1mm
and the total routing length less than 50mm. The total trace length inside the module is 27mm, so the
exterior total trace length should be less than 23mm.
SD card interface is not supported on ThreadX modules.
3.14. Wireless
Connectivity Interfaces
EC25 supports a low-power SDIO 3.0 interface for WLAN and UART/PCM interfaces for BT function.
The following table shows the pin definition of wireless connectivity interfaces.
Table 16: Pin Definition of Wireless Connectivity Interfaces
Pin Name
Pin No.
I/O
Description
Comment
WLAN Part
SDC1_DATA3
129
IO
WLAN SDIO data bus D3
1.8V power domain
SDC1_DATA2
130
IO
WLAN SDIO data bus D2
1.8V power domain
SDC1_DATA1
131
IO
WLAN SDIO data bus D1
1.8V power domain
SDC1_DATA0
132
IO
WLAN SDIO data bus D0
1.8V power domain
SDC1_CLK
133
DO
WLAN SDIO bus clock
1.8V power domain
SDC1_CMD
134
IO
WLAN SDIO bus command
1.8V power domain
WLAN_EN 136
DO
WLAN function control via FC20
module.
1.8V power domain.
Active high.
Cannot be pulled up
before startup.
Coexistence and Control Part
NOTE
