LTE Standard Module Series
EC200T Series Hardware Design
EC200T_Series_Hardware_Design 50 / 90
Figure 23: Reference Circuit of SD Card Interface
In SD card interface design, in order to ensure good communication performance with SD card, the
following design principles should be complied with:
The voltage range of SD card power supply VDD_3V is 2.7–3.6 V and a sufficient current up to 0.8 A
should be provided. As the maximum output current of SD_SDIO_VDD is 50 mA which can only be
used for SDIO pull-up resistors, an externally power supply is needed for SD card.
To avoid jitter of bus, resistors R7–R11 are needed to pull up the SDIO to SD_SDIO_VDD. Value of
these resistors is among 10 k
Ω
to 100 k
Ω
and the recommended value is 100 k
Ω
. SD_SDIO_VDD
should be used as the pull-up power.
In order to adjust signal quality, it is recommended to add 0
Ω
resistors R1–R6 in series between the
module and the SD card. The bypass capacitors C1–C6 are reserved and not mounted by default. All
resistors and bypass capacitors should be placed close to the module.
In order to offer good ESD protection, it is recommended to add a TVS diode on SD card pins near
the SD card connector with junction capacitance less than 15 pF.
Keep SDIO signals far away from other sensitive circuits/signals such as RF circuits, analog signals,
etc., as well as noisy signals such as clock signals, DC-DC signals, etc.
It is important to route the SDIO signal traces with total grounding. The impedance of SDIO data trace
is 50
Ω
±10%.
Make sure the adjacent trace spacing is two times of the trace width and the load capacitance of
SDIO bus should be less than 15 pF.
It is recommended to keep the traces of SD_SDIO_CLK, SD_SDIO_DATA[0:3] and SD_SDIO_CMD
with equal length (the difference among them is less than 1 mm) and the total routing length needs to
be less than 50 mm.
