A
CRONYMS
IPMI
Intelligent Platform Management Interface
ITP
In-Target Probe
KB
1024 bytes.
KCS
Keyboard Controller Style
KVM
Keyboard, Video, Mouse
LAN
Local Area Network
LCD
Liquid Crystal Display
LCT
Lower Critical Threshold
LED
Light Emitting Diode
LNCT
Lower Non-Critical Threshold
LNRT
Lower Non-Recoverable Threshold
LPC
Low Pin Count
LSI
Large Scale Integration
LUN
Logical Unit Number
MAC
Media Access Control
MB
1024 KB
MD2
Message Digest 2 – Hashing Algorithm
MD5
Message Digest 5 – Hashing Algorithm – Higher Secu-
rity
Ms
Milliseconds
Mux
Multiplexer
NIC
Network Interface Card
NMI
Non-maskable Interrupt
NM
Node Management
OBF
Output buffer
OEM
Original Equipment Manufacturer
[0.3.1]
T
ERM
D
EFINITION
Ohm
Unit of electrical resistance
PDB
Power Distribution Board
PEF
Platform Event Filtering
PEP
Platform Event Paging
PERR
Parity Error
POH
Power-On Hours
POST
Power-On Self Test
PWM
Pulse Width Modulation
RAC
Remote Access Card
RAM
Random Access Memory
RMCP
Remote Management Control Protocol
ROM
Read Only Memory
RTC
Real-Time Clock. Component of the chipset on the
baseboard.
RTOS
Real Time Operation System
SCI
Serial Communication Interface
SDC
SCSI Daughter Card
SDR
Sensor Data Record
SEEPROM
Serial Electrically Erasable Programmable Read-Only
Memory
SEL
System Event Log
SERR
System Error
SMBus
A two-wire interface based on the I
2
C protocol. The
SMBus is a low-speed bus that provides positive
addressing for devices, as well as bus arbitration
SMI
Server Management Interrupt. SMI is the highest prior-
ity non-maskable interrupt
[0.3.1]
T
ERM
D
EFINITION