A
CRONYMS
Acronyms
[0.3.1]
T
ERM
D
EFINITION
A/D
Analog to Digital
ACPI
Advanced Configuration and Power Interface
ASF
Alerting Standard Forum
Asserted
Active-high (positive true) signals are asserted when in
the high electrical state (near power potential). Active-
low (negative true) signals are asserted when in the
low electrical state (near ground potential).
BIOS
Basic Input/Output System
BIST
Built-In Self Test
BMC
At the heart of the IPMI architecture is a microcontroller
called the Baseboard management controller (BMC)
Bridge
Circuitry connecting one computer bus to another,
allowing an agent on one to access the other
BSP
Bootstrap processor
Byte
8-bit quantity
CLI
Command Line Interface
CMOS
In terms of this specification, this describes the PC-AT
compatible region of battery-backed 128 bytes of mem-
ory, which normally resides on the baseboard
CPU
Central Processing Unit
Deasserted
A signal is deasserted when in the inactive state.
Active-low signal names have “_L” appended to the
end of the signal mnemonic. Active-high signal names
have no “_L” suffix. To reduce confusion when referring
to active-high and active-low signals, the terms one/
zero, high/low, and true/false are not used when
describing signal states.
DTC
Data Transfer Controller
EEPROM
Electrically Erasable Programmable Read-Only Mem-
ory
EMP
Emergency Management Port
FRU
Field Replaceable Unit
GB
1024 MB.
GPIO
General Purpose Input/Out
HSC
Hot-Swap Controller
Hz
Hertz (1 cycle/second)
I
2
C
Inter-Integrated Circuit bus
IANA
Internet Assigned Numbers Authority
IBF
Input buffer
ICH
I/O Controller Hub
ICMB
Intelligent Chassis Management Bus
IERR
Internal Error
IP
Internet Protocol
IPMB
Intelligent Platform Management Bus
[0.3.1]
T
ERM
D
EFINITION
