Manual for Advance 5/133E
18
Ultra ATA/66
According to the previous ATA/IDE hard drive data transfer protocol, the signaling way to
send data was in synchronous strobe mode by using the rising edge of the strobe
signal. The Ultra ATA/33 protocol doubles the burst transfer rate from 16.6MB/s to
33.3MB/s, by using both the rising and falling edges of the strobe signal, this time Ultra
ATA/66 doubles the Ultra ATA burst transfer rate once again (from 33.3MB/s to 66.6MB/
s) by reducing setup times and increasing the strobe rate. The faster strobe rate
increases EMI, which cannot be eliminated by the standard 40-pin cable used by ATA
and Ultra ATA. To eliminate this increase in EMI, a new 40-pin, 80-conductor cable is
needed. This cable adds 40 additional ground lines between each of the original 40
ground and signal lines. The additional 40 lines help shield the signal from EMI, reduce
crosstalk and improves signal integrity.
Ultra ATA/33 introduced CRC (Cyclical Redundancy Check), a new feature of IDE that
provides data integrity and reliability. Ultra ATA/66 uses the same process. The CRC
value is calculated by both the host and the hard drive. After the host-request data is
sent, the host sends its CRC to the hard drive, and the hard drive compares it to its
own CRC value. If the hard drive reports errors to the host, then the host retries the
command containing the CRC error.
Ultra ATA/66 technology increases both performance and date integrity. However there
are basically five requirements for your system to run in Ultra ATA/66 mode:
1.
The system board must have a special Ultra ATA/66 detect circuit, such as
Superb 1 mainboard.
2.
The system BIOS must also support Ultra ATA/66.
3.
The operating system must be capable of DMA transfers. Win95 (OSR2) ,
Win98 and WindowsNT are capable.
4.
An Ultra ATA/66 capable, 40-pin, 80-conductor cable is required.
5.
Ultra ATA/66 compatible IDE device such as a hard drive or CD-ROM drive.
PC-133 Memory
PC133 SDRAM Unbuffered DIMM defines the electrical and mechanical requirements for
168-pin, 3.3 Volt, 133MHz, 64/72-bit wide, Unbuffered Synchronous DRAM Dual In-Line
Memory Modules (SDRAM DIMMs). Relatively , the peak bandwidth of PC-133 memory is
the 33% higher than PC-100 memory. These latest SDRAMs are necessary to meet the
enhanced 133MHz bus speed requirement.
A5/133E mainboard based on VIA Apollo Pro 133(693A) chipset which is the first chipset
to adopt the PC-133 technology.
Introduction
