12
30
PB2
MOSI
PB2 – general purpose digital I/O
Alternative functions:
MOSI – SPI Master Data output, Slave Data input for SPI
channel. When the SPI is enabled as a slave, this pin is
configured as an input regardless of the setting of DDB2. When
the SPI is enabled as a master, the data direction of this pin is
controlled by DDB2. When the pin is forced to be an input, the
pull-up can still be controlled by the PORTB2 bit.
31
PB1
SCK
PB1 – general purpose digital I/O
Alternative functions:
SCK – Master Clock output, Slave Clock input pin for SPI
channel. When the SPI is enabled as a slave, this pin is
configured as an input regardless of the setting of DDB1. When
the SPI is enabled as a master, the data direction of this pin is
controlled by
DDB1. When the pin is forced to be an input, the pull-up can still
be controlled by the PORTB1 bit.
32
PB0
#SS
PB0 – general purpose digital I/O
Alternative functions:
SS – Slave Port Select input. When the SPI is enabled as a
slave, this pin is configured as an input regardless of the setting
of DDB0. As a slave, the SPI is activated when this pin is driven
low. When the SPI is enabled as a master, the data direction of
this pin is controlled by DDB0. When the pin is forced to be an
input, the pull-up can still be controlled by the PORTB0 bit.
Table 31 and Table 32 relate the alternate functions of Port B to
the overriding signals shown in Figure 33 on page 67. SPI MSTR
INPUT and SPI SLAVE OUTPUT constitute the MISO signal,
while MOSI is divided into SPI MSTR OUTPUT and SPI SLAVE
INPUT.
Detailed description of PB, PD, PE ports can be found in ATmega128 microcontroller datasheets.
