13
1.8.3 Watchdog timer output (J2)
The
PEB-7706G2A
contains a watchdog timer that will reset the CPU or send
a signal to IRQ11 in the event the CPU stops processing. This feature
means the
PEB-7706G2A
will recover from a software failure or an EMI
problem. The J2 jumper settings control the outcome of what the com-
puter will do in the event the watchdog timer is tripped.
Table 1.4: Watchdog timer output (J2)
Function
Jumper Setting
IRQ11
* Reset
* default setting
Note:
The interrupt output of the watchdog timer is a
low level signal. It will be held low until the
watchdog timer is reset.
1
1-2 closed
1
2-3 closed
Summary of Contents for PEB-7706G2A
Page 8: ...PEB 7706G2A User s Manual viii...
Page 16: ...PEB 7706G2A User s Manual xvi...
Page 17: ...1 CHAPTER 1 General Information...
Page 25: ...9 Figure 1 2 I O Connectors CN11 C C C CN55 CN31 CN32 N9 N4 N38...
Page 35: ...19 Chapter2 CHAPTER 2 Connecting Peripherals...
Page 49: ...33 Chapter4 CHAPTER 4 Chipset Software Installation Utility...
Page 54: ...PEB 7706G2A User s Manual 38...
Page 55: ...39 Chapter3 CHAPTER 3 Award BIOS Setup...
Page 74: ...PEB 7706G2A User s Manual 58...
Page 75: ...59 Chapter5 CHAPTER 5 LAN Configuration...
Page 80: ...PEB 7706G2A User s Manual 64...
Page 81: ...65 Chapter6 CHAPTER 6 Onboard Security Setup...
Page 86: ...PEB 7706G2A User s Manual 70...
Page 87: ...71 CHAPTER 7 SATA RAID Setup...
Page 93: ...77 AppendixA Appendix A Programming the Watchdog Timer...