BIOS Setup Information
PEB-2131VG2A User’s Manual
4-11
4.6
Advanced Chipset Features
This section allows you to configure the system based on the specific features of the
Intel US15W chipset. This chipset manages bus speeds and access to system memory
resources, such as DDR2 SDAM. It must be stated that these items should never
need to be altered. The default settings have been chosen because they provide the
best operating conditions for the system. The only time user might consider
making any changes would be if you discovered that data was being lost while
during system operation.
Phoenix- AwardBIOS CMOS Setup Utility
Advanced Chipset Features
Item Help
DRAM Timing Selectable
[By SPD]
X CAS Latency Time
Auto
X DRAM RAS# to CAS# Delay
Auto
X DRAM RAS# Precharge
Auto
X Precharge dealy [tRAS]
Auto
X System memory Frequency
Auto
SLP_S4# Assertion Width
[4 to 5 Sec.]
System BIOS Cacheable
[Enabled]
Video BIOS Cacheable
[Disabled]
Memory Hole At 15M-16M [Disable]
f
PCI Express Root port Func [press Enter]
** VGA Setting **
On-Chip Frame Buffer Size
[8MB]
DVMT Mode [DVMT]
DVMT/FIXED Memory Size [128MB]
Boot Display
[CRT+LVDS]
Panel Scaling [Auto]
Panel Number [800X600 18bit 1ch]
Menu Level
f
↑↓→←
: Move Enter: Select +/-/PU/PD: Value F10: Save ESC: Exit F1: General Help
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults
DRAM Timing Selectable
The choice: Manual, By SPD
SLP_S4# Assertion Width.
The choice: 1 to 2 Sec, 2 to 3 Sec, 3 to 4 Sec, 4 to 5 Sec.
System BIOS Cacheable.
When enabled, the system BIOS ROM at F0000h-FFFFFh.
The choice: Enabled, Disabled.
