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Manual PCI-DIO-48(S)

Summary of Contents for PCI-DIO-48

Page 1: ...MODEL PCI DIO 48 S USER MANUAL FILE MPCI DIO 48S D3c...

Page 2: ...nor the rights of others IBM PC PC XT and PC AT are registered trademarks of the International Business Machines Corporation Printed in USA Copyright 1995 2005 by Portwell I O Products Inc All rights...

Page 3: ...nty Warranty commences with equipment shipment Following Years Throughout your equipment s lifetime Portwell stands ready to provide on site or in plant service at reasonable rates similar to those of...

Page 4: ...tion Selection Map 12 Chapter 4 Address Selection 13 Chapter 5 Software 14 Chapter 6 Programming 17 Table 6 1 Address Assignment Table 17 Table 6 2 Control Register Bit Assignment 18 Table 6 3 Change...

Page 5: ...red and if any one or more bits change state a latched interrupt request can be generated Thus it is not necessary to use software to continuously poll the inputs to detect a change of state The chang...

Page 6: ...O 22 Gordos Potter Brumfield et al module mounting racks Every second conductor of the flat cables is grounded to minimize crosstalk between signals in the cables If needed for external circuits 5 VDC...

Page 7: ...l Outputs Logic High 2 0 VDC min source 32 mA Logic Low 0 55 VDC max sink 64 mA Power Output 5 VDC from computer bus ext 1A fast blow fuse recommended Power Required 5 VDC at 250 mA typical Size 6 9 L...

Page 8: ...STATE DETECT CHANGE OF STATE INTERRUPT APPLIES TO S CARDS ONLY CHANGE OF STATE INTERRUPT EXTERNAL INTERRUPT COMPUTER PCI BUS I O B U F F E R S C O N N E C T O R C O N N E C T O R PORT A PORT B PORT C...

Page 9: ...ous card options CD Software Installation The following instructions assume the CD ROM drive is drive D Please substitute the appropriate drive letter for your system as necessary DOS 1 Place the CD i...

Page 10: ...of the provided sample programs that was copied to the newly created card directory from the CD to test and validate your installation The base address assigned by BIOS or the operating system can cha...

Page 11: ...position the I O buffers are always enabled When the jumper is in the TST Tristate position enabled disabled state is controlled by a control register See the programming section of this manual for a...

Page 12: ...Figure 3 1 Option Selection Map Manual PCI DIO 48 S 12...

Page 13: ...s and the respective IRQs allotted Alternatively some operating systems Windows95 98 2000 can be queried to determine which resources were assigned In these operating systems you can use either PCIFin...

Page 14: ...ter It is not necessary to reboot your system prior to using IRQCOS SYS Win32COS DLL Description Win32COS DLL is a Dynamic Link Library or DLL for Windows 95 98 and NT It provides a simple interface t...

Page 15: ...d pointer while the upper 3 bytes will be invalid If multiple interrupts occur before any GetCOSData call the data read after the most recent IRQ will be returned The return result is TRUE if an IRQ w...

Page 16: ...s integer byval offset as integer byval value as integer as integer Note that in all of the above functions an inherent limitation of BASIC in general and VisualBASIC in particular makes the values se...

Page 17: ...ts A3 through A0 as follows Address Port Assignment Operation Base Address PA Group 0 Read Write Base Address 1 PB Group 0 Read Write Base Address 2 PC Group 0 Read Write Base Address 3 Control Group...

Page 18: ...eans to enable disable the tristate I O buffers under program control If the TST BEN jumper on the card is installed in the BEN position the I O buffers are permanently enabled However if that jumper...

Page 19: ...E_ADDRESS 3 0x09 Enable the tristate output buffers by using the same control byte used to configure the PPI but now set bit D7 low See item d above Programming Example BASIC The following example in...

Page 20: ...nd the output buffers will be disabled This problem can be resolved as follows Two computer I O bus addresses are available that permit you to enable or disable the I O buffers at will without program...

Page 21: ...through D5 control ports A B and C of the 8255 PPIs as shown in Table 4 Any access of Base B will enable the non COS IRQ associated with port C bit 3 Bit Port Controlled D0 Group 0 Port A D1 Group 0 P...

Page 22: ...ort C Hi PC6 3 4 Port C Hi PC5 5 6 Port C Hi PC4 7 8 Port C Lo PC3 9 Ground 10 Port C Lo PC2 11 12 Port C Lo PC1 13 14 Port C Lo PC0 15 16 Port B PB7 17 Ground 18 Port B PB6 19 20 Port B PB5 21 22 Por...

Page 23: ...ny problems with this manual or just want to give us some feedback please email us at tech portwell com Please detail any errors you find and include your mailing address so that we can send you any m...