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Portwell NAR-5620-0100, User Manual

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Portwell NAR-5620-0100 User Manual Download Page 13

NAR-5620 Series

User

’

s 

Manual

12

J17 : PCI-Express x4 Connector

PIN No.

Signal Description

PIN No.

Signal Description

B1

+12V

A1

+12V

B2

+12V

A2

+12V

B3

+12V

A3

+12V

B4

GND

A4

GND

B5

SM BUS CLOCK

A5

+5V

B6

SM BUS DAT

A6

+5V

B7

GND

A7

+3.3V

B8

+3.3V

A8

+3.3V

B9

+3.3V

A9

+3.3V

B10

3VSB

A10

+3.3V

B11

PCI-E WAKE Signal

A11

PCI-Express RESET

Key

B12

POWER GOOD Signal

A12

GND

B13

GND

A13

Reference Clock (+)

B14

Transmitter differential pair Lane 3(+)

A14

Reference Clock (-)

B15

Transmitter differential pair Lane 3(-)

A15

GND

B16

GND

A16

Receiver differential pair Lane 3 (+)

B17

WDT Clock

A17

Receiver differential pair Lane 3 (-)

B18

GND

A18

GND

B19

Transmitter differential pair Lane 2(+)

A19

+3.3V

B20

Transmitter differential pair Lane 2(-)

A20

GND

B21

GND

A21

Receiver differential pair Lane 2 (+)

B22

GND

A22

Receiver differential pair Lane 2 (-)

B23

Transmitter differential pair Lane 1(+)

A23

GND

B24

Transmitter differential pair Lane 1(-)

A24

GND

B25

GND

A25

Receiver differential pair Lane 1 (+)

B26

GND

A26

Receiver differential pair Lane 1 (-)

B27

Transmitter differential pair Lane 0(+)

A27

GND

B28

Transmitter differential pair Lane 0(-)

A28

GND

B29

GND

A29

Receiver differential pair Lane 0 (+)

B30

Reference Clock (+)

A30

Receiver differential pair Lane 0 (-)

B31

Reference Clock (-)

A31

GND

B32

GND

A32

+3.3V

J19 : Miscellaneous Header

PIN No.

Signal Description

1

+3.3V

2

VCC Power Suspend Signal

3

HDD Power Signal

4

GND

5

GND

6

5VSB

7

Reset

8

Power On

9

Load Default

10

GND

J25 : External Speaker Header

PIN No.

Signal Description

1

Speaker

                     

Summary of Contents for NAR-5620-0100

Page 1: ...tual required safety standards in accordance with 89 366 ECC EMC Directive and LVD 73 23 ECC UL This product meets all safety requirements per UL60950 standard Portwell Inc 3F No 92 Sec 1 Nei Hu Rd Ta...

Page 2: ...of Jumpers 6 2 4 The Chassis 13 2 12 Use a Client Computer 14 Chapter 3 BIOS Setting 17 BIOS Setup Information 17 Chapter 4 Programming Guide 17 4 1 Reset to Default Information 17 4 2 ByPass WDT Prog...

Page 3: ...Bypass Dual Personality module 1 2 Manual Organization This manual describes how to configure your NAR 5620 system to meet various operating requirements It is divided into three chapters with each ch...

Page 4: ...AR 5620 Series U s e r s Ma n u a l 3 Taipei Office Phone Number 886 2 27992020 1 4 Board Layout Figure 1 1 Board Layout of NAR 5620 M B 1 5 System Block Diagram Figure 1 2 NAR 5620 Basic Block Diagra...

Page 5: ...ABN 464 SFP x4 ABN 362 SFP with dual personality NAR 5622 0900 ABN 454 Copper x4 ABN 434 Copper x4 NAR 5622 0907 ABN 464 SFP x4 ABN 434 Copper x4 Figure 1 4 NAR 5620 Ethernet Module 1 6 Product Specif...

Page 6: ...Model 32b GbE Available max PCI E GbE on slot 1 Available max PCI E GbE on slot 2 NAR 5620 0100 1 4 2 NAR 5620 1 4 4 NAR 5620 D243 1 4 4 Hardware Monitor Support on board hardware monitor for System v...

Page 7: ...S T R U C T I O N S 2 This guide is for technically qualified personnel who have experience installing and configuring system boards Disconnect the system board power supply from its power source befo...

Page 8: ...9 11 10 12 15 17 16 18 RS232 JP11 RTC CMOS Clear Jumper Setting Default 2 3 JP7 PCI E x4 Configuration JP7 Function 1 2 4 5 One PCI Express x4 Configuration 2 3 5 6 Four PCI Express X1 Configuration...

Page 9: ...ort USB Header J17 PCI Express x4 Connector for Nic Card used J19 Miscellaneous Header Pin2 4 Power LED Pin1 3 HDD LED Pin6 8 Power Button Pin5 7 Reset Button Pin9 10 Load Default Setting Button J21 J...

Page 10: ...N No Signal Description PIN No Signal Description 1 Data Carrier Detect 2 Data Set Ready 3 Receive Data 4 Request to Send 5 Transmit Data 6 Clear to Send 7 Data Terminal Ready 8 Ring Indicator 9 GND 1...

Page 11: ...D A25 Receiver differential pair Lane 2 B26 GND A26 Receiver differential pair Lane 2 B27 Transmitter differential pair Lane 3 A27 GND B28 Transmitter differential pair Lane 3 A28 GND B29 GND A29 Rece...

Page 12: ...SA1 20 SA0 21 Data 0 22 Data 1 23 Data 2 24 NC 25 NC 26 NC 27 Data 11 28 Data 12 29 Data 13 30 Data 14 31 Data 15 32 SDCS 3 33 Ground 34 IOR 35 IOW 36 WE 37 INT 38 5V 39 Ground 40 NC 41 RESET 42 IORDY...

Page 13: ...rential pair Lane 2 A19 3 3V B20 Transmitter differential pair Lane 2 A20 GND B21 GND A21 Receiver differential pair Lane 2 B22 GND A22 Receiver differential pair Lane 2 B23 Transmitter differential p...

Page 14: ...10 5V J38 80H LPC PIN Header PIN No Signal Description 1 LAD0 2 3 3V 3 LAD1 4 PCI Reset 5 LAD2 6 FRAME 7 LAD3 8 CLOCK 10 GND 2 4 The Chassis The system is integrated in a customized 1U chassis Fig 2...

Page 15: ...put connected to it the console may be used to communicate with NAR 5620 To access NAR 5620 via the console Hyper Terminal is one of many choices Follow the steps below for the setup Note Terminal sof...

Page 16: ...a n u a l 15 4 Please make the port settings to Baud rate 19200 Parity None Data bits 8 Stop bits 1 5 Turn on the power of NAR 5620 system after following screen was shown 6 You can then see the boot...

Page 17: ...f y o uw a n t t or u nS e t u p a p p e a r d u r i n gP O S T a f t e r t u r n i n go no r rebooting the computer press Tab key immediately to enter BIOS setup program This is the end of this sect...

Page 18: ...commended that you save the current BIOS to a disk in the event that BIOS needs to be reset to its original settings If you wish to upgrade to a new BIOS Award BIOS utility can be used Awdflash allows...

Page 19: ...2 P 0 0 no SCI event evoked Second Enabe ACPI IO port by setting ACPI_EN bit7 B0 D31 F0 Offset_44h_bit7P1 Third Get PMBASE ACPI I O port BAR and save to EBX_bit 31 16 PMBASE B0 D31 F0 Offset 40 43h Le...

Page 20: ...r3 db This status bit 1 RST2DF button has been pressed 0dh 0ah PROMP_Str4 db This status bit can be read by WML_GPI6 0dh 0ah PROMP_Str5 db and can be cleared by an WML_GPO19 High1 Low High2 pulse 0dh...

Page 21: ...r other key to go on next test GP_INV_OFFSET db 2Ch The offset value from GPIOBASE GPE0_STS_OFFSET db 28h The offset value from PMBASE GP_LVL2_OFFSET db 38h The offset value from GPIOBASE GP_IO_SEL2 d...

Page 22: ...h 09h int 21h lea dx PROMP_Str1 mov ah 09h int 21h lea dx PROMP_Str2 mov ah 09h int 21h lea dx PROMP_Str3 mov ah 09h int 21h lea dx PROMP_Str4 mov ah 09h int 21h lea dx PROMP_Str5 mov ah 09h int 21h l...

Page 23: ...PI_ROUT bit 13 12 P 0 0 Let GPI6 not evoke SCI Write GPI_Rout bit 13 12 to 0 0 for no effect on GPI6 B0 D31 F0 Offset_B8h Bit 13 12 P 0 0 no SCI event evoked Second Enabe ACPI IO port by setting ACPI_...

Page 24: ...let GPI6 not out dx eax evoke SCI event mov dx 0CF8h PCI Config Read mov eax 8000F844h B0 D31 F0 Offset_44h out dx eax mov dx 0CFCh in eax dx or al 80h bit 7 set to 1 to enable PMBASE out dx eax mov...

Page 25: ...F0 Offset_4Ch_bit4P1 Enable ICH7R GPIO GPO39 GP_LVL GPIOBASE 38h _bit7P 0 1 Write value 0 1 How to read GPI6 GPI6 status must NOT be inverted First GPI_INV GPIOBASE 2Ch bit6P0 GPI6 not inverted Get G...

Page 26: ...mov ecx eax Save GPIOBASE to ECX 31 16 Get GPIOBASE Base Address and save to ECX_bit 31 16 Testing way t1 Read GPI6 first GPI6 0 if yes pass if no failed t2 RST2DF button pressed and released read GP...

Page 27: ...xor bx bx mov bl 02h add dx bx in al dx read first and al 08h out dx al mov dx 486h mov dx cx xor bx bx mov bl 06h add dx bx in al dx call IODELAY io delay and al 0F7h bit19 0 out dx al Initial GPIO39...

Page 28: ...9 out dx al output GPO19 1 make sure GPO39 1 end MUST DO Start GP_INV bit6 MUST Program 0 for GPI6 state not inverted start xor bx bx mov bl GP_INV_OFFSET Not invert GPI6 status mov dx cx add dx bx bi...

Page 29: ...16 Get GPI6 status from GPE0_STS PMBASE 28h bit22 0 low 1 high level call READ_GPI6_TO_AL and al 40h mask bit6 cmp al 00h je next_test1 okay go on test jz next_test1 okay go on test no error message...

Page 30: ...ll KB_Wait t1 end next_test1 t2 start lea dx promp_rst2df mov ah 09h int 21h lea dx promp_anykey mov ah 09h int 21h xor al al halt for ready Any key pressed to go on WAIT_KB_0 mov ah 1 int 21h cmp al...

Page 31: ...0h mask bit6 cmp al 40h je next_test2 okay go on test no error message display lea dx promp_err2 mov ah 09h int 21h ror edx 10h error flag EDX_Bit17 1 Error happened or dl 02h rol edx 10h call KB_Wait...

Page 32: ...mov dx cx xor bx bx mov bl 0eh add dx bx in al dx read first call IODELAY io delay or al 08h out dx al output GPO19 1 first call FIXDELAY 30 us delay in al dx output GPO19 0 then call IODELAY and al 0...

Page 33: ...2DF F F and al 40h mask Bit6 cmp al 00h je test_end okay then end jz test_end okay then end no error message display lea dx promp_err3 mov ah 09h int 21h ror edx 10h error falg EDX_Bit18 1 Error happe...

Page 34: ...promp_TEST_fail mov ah 09h int 21h jmp return_to_dos test_ok lea dx promp_TEST_OK mov ah 09h int 21h ror ecx 10h ECX 15 0 to ECX 31 16 Restore GPIOBASE to ECX 31 16 return_to_dos mov ah 4ch Return to...

Page 35: ...op dx pop ax ret IODELAY ENDP KB_wait PROC near push ax push bx push cx push dx lea dx PROMP_Qkey mov ah 9 Display Q key prompt int 21h xor al al WAIT_KB mov ah 1 int 21h cmp al 0 je WAIT_KB cmp al 51...

Page 36: ...35 jmp test_fail call_return lea dx PROMP_2_CR_LF mov ah 09h int 21h pop dx pop cx pop bx pop ax ret KB_wait ENDP READ_GPI6_TO_AL Input NONE STACK PRESENT Output AL Bit6 GPI6 Destroy AL READ_GPI6_TO_A...

Page 37: ...d bl 02h Point to Bit22 add dx bx in al dx call IODELAY io delay MUST to do write 1 to clear GPE0_STS_bit6 to 0 FIRST due to the access 0 1 This register is R WC and will be set at any time when GPI s...

Page 38: ...ne is called to wait for 15 microseconds count in CX then return Gives a programmed software delay FIXDELAY PROC near push cx push dx push ax pushf mov cx 02h mov dx 61h in al dx jmp 2 jmp 2 and al 00...

Page 39: ...gle interface for those applications where both LCD display and keypad are required This interface should be available in every computing system The communication implementation should be OS independe...

Page 40: ...ice Phone Number 886 2 27992020 4 3 3 Mechanical Specification Module Size mm 101 6 W x 26 0 H x 30 6 D max Display Format 16 characters x 2 lines Character Size 3 0 x 5 23 mm 4 3 4 General Specificat...

Page 41: ...s used in the Serial Port interface Figure C 2 2 5 4 3 2 1 10 9 8 7 6 Pin 2 TxD Pin 3 RxD Pin 5 Ground Fig C 2 1 Power connector and serial port connector of EZIO 100 Fig C 2 2 Pin assignment In other...

Page 42: ...ice which will display those data received from RS 232 port and reply key pressing status to polling command from RS 232 port Both commands and data go thru RS 232 ports To distinguish between data an...

Page 43: ...f corresponding key There are four keys in this module upper arrow down arrow enter ENT and escape ESC The relationship between the function key corresponding status bit and status byte is shown as th...

Page 44: ...t ot h i s mo d u l e F o r e x a mp l e t h i smo d u l ew i l l d i s p l a yt h ec u s t o mi z e di c o na t l o c a t i o n6 4t o7 1u p o nr e c e i v i n gd a t a 0 white i t w i l l d i s p l a...

Page 45: ...NAR 5620 Series U s e r s Ma n u a l 44 4 3 9 Character Generator ROM CGROM...

Page 46: ...essage if ENTER button is pressed 4 display ESC message if ESC button is pressed 5 display DOWN message if scroll down button is pressed Program Overview Parameters fd a file name for open method here...

Page 47: ...number is 0xFE 0x25 4 After clear screen and display welcome message ReadKey method must be call to advise EZIO for reading data 5 A pooling method is implemented to get input from EZIO while any but...

Page 48: ...readkey 6 Read key void ReadKey write fd Cmd 1 write fd readkey 1 int blank 8 Blank display void Blank write fd Cmd 1 write fd blank 1 int hide 12 Hide cursor display blanked characters void Hide writ...

Page 49: ...24 Scroll cursor 1 character left void ScrollL write fd Cmd 1 write fd scl 1 int scr 28 Scroll cursor 1 character right void ScrollR write fd Cmd 1 write fd scr 1 int setdis 64 Command void SetDis wri...

Page 50: ...it Cls Clear screen ShowMessage mes1 mes2 while 1 int res char buf 255 SetDis ReadKey sub routine to send read key command res read fd buf 255 read response from EZIO switch buf 1 Switch the Read comm...

Page 51: ...s e r s Ma n u a l 50 ShowMessage mes1 mes5 display Portwell EZIO break display Enter is selected case 0x4E Escape Botton was received Cls ShowMessage mes1 mes6 display Portwell EZIO break display Es...

Page 52: ...Hans_20050704 union REGS regs swh_cur swh_flg unsigned char swh_flg 1 Cursor on 0 Cursor off regs h ah 1 Function 1 of interrupt 10H Change cursor size if swh_flg regs h ch 12 Starting line no of curs...

Page 53: ...ound void display_menu clrscr display_line 1 0 14 1 display_line 1 1 14 1 display_line 1 2 ROBO 8712 8710 GPIO Testing Program 14 1 display_line 1 3 14 1 display_line 1 4 14 1 display_line 1 5 14 1 di...

Page 54: ...y_line 1 21 14 1 display_line 1 22 14 1 display_line 1 23 14 1 display_line 1 24 14 1 display_line 55 1 VerNum 11 1 void init_GPIO Enter the extended function mode outport 0x2e 0x87 outport 0x2e 0x87...

Page 55: ...14 1 outport 0x2e 0xf0 outport 0x2f 0x10 GP14 Input GP15 output GP15 output 0 and GP14 input outport 0x2e 0xf1 outport 0x2f 0x00 indata inport 0x2f check1 indata 0x10 outport 0x2e 0xf0 outport 0x2f 0x...

Page 56: ...40 GP16 Input GP17 Output GP17 output 1 and GP16 input outport 0x2e 0xf1 outport 0x2f 0x80 indata inport 0x2f check2 indata 0x40 if check1 4 check2 0 display_line 50 8 PASS 15 1 if check1 0x40 check2...

Page 57: ...1 2 check2 0 display_line 50 9 PASS 15 1 if check1 0x20 check2 0x00 display_line 50 9 PASS 15 1 else display_line 50 9 FAIL 12 1 fail_beep Test GPI2 P2 output and P3 input display_line 1 10 GPIO P2 ou...

Page 58: ...if check1 0x80 check2 0x00 display_line 50 10 PASS 15 1 else display_line 50 10 FAIL 12 1 fail_beep exit_GPIO int main void int x outdata indata check swh_cur 0 display_menu display_line 1 23 Press an...

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