PLX Technology USB3382-AIC Rapid Hardware Reference Manual Download | Manualshive

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USB3382-AIC RDK

© PLX Technology, www.plxtech.com

Page 26 of 34

06Aug12, version 1.3

3.2

x2

Add

‐

In

Card

Strap

Pin

Setting

Figure 19. x2 Add-In Card Dipswitch Setting

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Summary of Contents for USB3382-AIC Rapid

Page 1: ...USB3382 AIC RDK PLX Technology www plxtech com Page 1 of 34 06Aug12 version 1 3 PLX Technology Hardware Reference Manual USB3382 AIC Rapid Development Kit...

Page 2: ...rrors incidental or consequential damages in connection with the furnishing performance or use of this manual or examples herein PLX assumes no responsibility for damage or loss resulting from the use...

Page 3: ...PCI Express to USB Client Bridge 15 2 4 PCI Express Upstream Port Connection 15 2 5 PCI Express Downstream Port Connections 16 2 6 USB Connection 16 2 7 Clock Circuitry 16 2 8 Hardware Strap Pin Dips...

Page 4: ...e 8 Configuration Dipswitches___________________________________________________________________________ 17 Figure 9 EEPROM in Socket __________________________________________________________________...

Page 5: ...__________________________________ 6 Table 2 Ordering Information ________________________________________________________________________________ 6 Table 3 Component Table____________________________...

Page 6: ...lly connected to it The downstream PCIe connectors have 1 or 2 PCIe Gen2 lanes electrically connected to it depending on board configuration The USB3382 RDK supports the use of one configuration modul...

Page 7: ...USB3382 AIC RDK PLX Technology www plxtech com Page 7 of 34 06Aug12 version 1 3 Figure 1 USB3382 RDK Front View...

Page 8: ...rts support one full featured Virtual Channel VC0 o All Ports support eight Traffic Class TC 7 0 mapping independently of the other Ports 4 General Purpose Input Output GPIO pins with Pulse Width Modu...

Page 9: ...PCI Express Gen 2 to USB 3 0 SuperSpeed Peripheral Controller X4 Upstream goldfinger Two downstream PCI Express x16 Slot Connectors DIP Switches for hardware configuration of USB3382 Socketable Serial...

Page 10: ...desired port configuration 3 Check and install the configuration module for the desired mode 4 Check and set the power jumpers for Addin card mode operation 5 Plug in a hard disk power connector into...

Page 11: ...s for desired port configuration 2 Check and install the configuration module for the desired mode 3 Check and set the power jumpers for Self Powered Mode operation 4 Plug in an ATX power supply 24 pi...

Page 12: ...owing steps to use the RDK in Root Complex mode Bus Powered 1 Check and set dipswitches for desired port configuration 2 Check and install the configuration module for the desired mode 3 Check and set...

Page 13: ...USB3382 AIC RDK PLX Technology www plxtech com Page 13 of 34 06Aug12 version 1 3 2 USB3382 RDK Hardware Architecture 2 1 Architecture Block Diagram Figure 5 RDK Architecture...

Page 14: ...wer on Reset Button S2 2 Voltage Indicator LEDs D9 D10 D12 D13 D14 D15 D17 11 PERST Button S1 3 ATX Hard Disk Connector J2 12 I2C Connector JP2 4 Power Configuration Jumpers JP3 JP12 13 EEPROM Enable...

Page 15: ...It features 2 PCI express Gen 2 x1 ports and 1 USB 3 0 SuperSpeed Client Port The device comes in a 10x10mm2 132 lead package 2 4 PCI Express Upstream Port Connection The upstream x4 connector will be...

Page 16: ...t pins An internal clock buffer fans out this input clock to the RefClk output pins which provide RefClk to the PCIe connectors In the Root Complex Mode configuration the RDK is not connected to a PCI...

Page 17: ...select the USB 3382 s Port configuration L x1 x1 H X2 Default Setting L RC_MODE Root Complex Mode Enable L Adapter Mode H Root Complex Mode Default Setting L SMBUS_EN System Management Bus Enable L En...

Page 18: ...ription Switch Position Settings TESTMODE 3 0 Factory Test only Default Setting HLLL CLKSEL Selects between Onboard RefClk and PCIE slot RefClk L Onboard RefClk H PCIE slot RefClk Default Setting H I2...

Page 19: ...nce Clock H Center Spread Reference Clock is not supported Default Setting H DBGMODE Factory Test Only Default Setting L Table 7 SW4 Functions SW3 Functional Description Switch Position Settings DBG_P...

Page 20: ...I TRST TMS TDO TCK NC NC NC NC NC GND GND GND GND GND Figure 10 Pin Assignment of JTAG Port Header JP1 2 12 I2C SMBUS Interface The USB3382 provides a two wire I2C SMBus compatible slave mode interfac...

Page 21: ...T E9P N Figure 13 DB9 Male Connector 2 14 FATAL_ERR INTA and GPIO LEDs The USB3382 RDK device has a number of chip specific side band signals that are intended for various uses The FATAL_ERR output is...

Page 22: ...the pushbutton switch input to the AND gate and the output of the AND gate is fed into the reset chip The PERST button S1 and POWER ON RESET button S2 are shown below Figure 15 Manual PERST button 2...

Page 23: ...2VDC and 3 3VDC power pins The USB3382 has a built in switching regulator that will provide the 1 0V supply required by the chip from the 3 3V supply input with only a few external components necessar...

Page 24: ...ffic Figure 17 Midbus 2 0 Probe Footprint 2 21 WAKE and Vaux Support The Wake signals from the downstream slots and the USB3382 are connected together with the Wake signal from the slot in addin card...

Page 25: ...perate in one of several modes as described in this section The modes can be entered by changing jumpers and configuration modules The configuration modules control the routing of the PCIE lanes and R...

Page 26: ...USB3382 AIC RDK PLX Technology www plxtech com Page 26 of 34 06Aug12 version 1 3 3 2 x2 Add In Card Strap Pin Setting Figure 19 x2 Add In Card Dipswitch Setting...

Page 27: ...5 4 8 RN3 5 4 8 RN2 4 8 5 16 9 ON SW2 8 16 ON 9 SW3 8 8 5 SW1 4 C6 C3 R13 R12 TP24 C69 C65 C94 C81 SSC_CT LEGACY DEBUG_SEL FAST_BRINGUP PLL_BYPASS SERDES_MODE_EN PROBE_MODE TESTMODE0 TESTMODE1 TESTMOD...

Page 28: ...USB3382 AIC RDK PLX Technology www plxtech com Page 28 of 34 06Aug12 version 1 3 3 4 x2 Root Complex Mode Dipswitch Setting R12 Figure 21 x2 Root Complex Mode Dipswitch Setting...

Page 29: ...card mode the RDK is plugged into a PC Power is sourced from the system Power to the RDK can come from the following sources 1 System Slot System Powered Mode Connect RDK into PCIE slot 2 ATX Power C...

Page 30: ...USB3382 AIC RDK PLX Technology www plxtech com Page 30 of 34 06Aug12 version 1 3 Figure 22 Jumper Settings for System Powered Mode...

Page 31: ...USB3382 AIC RDK PLX Technology www plxtech com Page 31 of 34 06Aug12 version 1 3 Figure 23 Jumper Settings for Self Powered Mode...

Page 32: ...USB3382 AIC RDK PLX Technology www plxtech com Page 32 of 34 06Aug12 version 1 3 D16 R64 R67 Figure 24 Jumper Settings for Bus Powered Mode...

Page 33: ...on number is part of the board number etched in copper on the solder side of the board near the goldfinger The revision is the third field of the part number The image below shows the Rev 001 RDK Figu...

Page 34: ...com Page 34 of 34 06Aug12 version 1 3 Revision 001 has a two pin jumper that that only connects GPIO0 to EN2 of the DC DC converter which by default should also be enabled The default setting on RDK R...

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